SNVSC32 December 2021 LP5868
PRODUCTION DATA
SRAM is implemented inside the LP5868 device to support data writing and reading at the same time.
Although data refresh mechanisms are not the same for Mode 1 and Mode 2, and Mode 3, the data writing and reading follow the same method. Uses can update partial of the SRAM data only or the whole SRAM page simultaneously. The LP5868 supports auto-increment function to minimize data traffic and increase data transfer efficiency.
Please note that 16-bit PWM (Mode 3) and 8-bit PWM (Mode 1 and Mode 2) are assigned with different SRAM addresses.