SNVSA91F September   2015  – April 2021 LP5910

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 No-Load Stability
      2. 7.3.2 Thermal Overload Protection
      3. 7.3.3 Short-Circuit Protection
      4. 7.3.4 Output Automatic Discharge
      5. 7.3.5 Reverse Current Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Capacitor Characteristics
        5. 8.2.2.5 Remote Capacitor Operation
        6. 8.2.2.6 No-Load Stability
        7. 8.2.2.7 Enable Control
        8. 8.2.2.8 Power Dissipation
        9. 8.2.2.9 Estimating Junction Temperature
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 DSBGA Mounting
      2. 10.1.2 DSBGA Light Sensitivity
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 Reverse Current Protection

The device contains a reverse current protection circuit that prevents a backward current flowing through the LDO from the OUT pin to the IN pin.