LP5912 500-mA Low-Noise, Low-IQ LDO
- SNVSA77D December 2015 – November 2016 LP5912
  
  PRODUCTION DATA.

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DATA SHEET

LP5912 500-mA Low-Noise, Low-IQ LDO

1 Features

Input Voltage Range: 1.6 V to 6.5 V
Output Voltage Range: 0.8 V to 5.5 V
Output Current up to 500 mA
Low Output-Voltage Noise: 12 µV_RMS Typical
PSRR at 1 kHz: 75 dB Typical
Output Voltage Tolerance (V_OUT ≥ 3.3 V): ±2%
Low I_Q (Enabled, No Load): 30 µA Typical
Low Dropout (V_OUT ≥ 3.3 V): 95 mV Typical at 500-mA Load
Stable With 1-µF Ceramic Input and Output Capacitors
Thermal-Overload and Short-Circuit Protection
Reverse Current Protection
No Noise Bypass Capacitor Required
Output Automatic Discharge for Fast Turnoff
Power-Good Output With 140-µs Typical Delay
Internal Soft-Start to Limit the In-rush Current
–40°C to +125°C Operating Junction Temperature Range

2 Applications

Camera Modules
Sensors
HiFi Audio Radio Transceivers
PLL/Synthesizer, Clocking
Medium-Current, Noise-Sensitive Applications

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3 Description

The LP5912 is low-noise LDO that can supply up to 500 mA of output current. Designed to meet the requirements of RF and analog circuits, the LP5912 device provides low noise, high PSRR, low quiescent current, and low line and load transient response. The LP5912 offers class-leading noise performance without a noise bypass capacitor and with the ability for remote output capacitance placement.

The device is designed to work with a 1-µF input and a 1-µF output ceramic capacitor (no separate noise bypass capacitor required).

This device is available with fixed output voltages from 0.8 V to 5.5 V in 25-mV steps. Contact Texas Instruments Sales for specific voltage option needs.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
LP5912	WSON (6)	2.00 mm × 2.00 mm

For all available packages, see the Package Option Addendum (POA) at the end of this data sheet.

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Simplified Schematic

4 Revision History

Changes from C Revision (September 2016) to D Revision

Added package drawing Go

Changes from B Revision (June 2016) to C Revision

Changed wording of data sheet title Go
Changed wording of first sentence of DescriptionGo

Changes from A Revision (April 2016) to B Revision

Changed "linear regulator" to "LDO" on page 1 Go

5 Voltage Options

This device is capable of providing fixed output voltages from 0.8 V to 5.5 V in 25-mV steps. For all available package and voltage options, see the POA at the end of this datasheet. Contact Texas Instruments Sales for specific voltage option needs.

6 Pin Configuration and Functions

DRV Package

6-Pin WSON With Thermal Pad

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NUMBER	NAME	I/O	DESCRIPTION
1	OUT	O	Regulated output voltage
2	NC	—	No internal connection. Leave open, or connect to ground.
3	PG	O	Power-good indicator. Requires external pullup.
4	EN	I	Enable input. Logic high = device is ON, logic low = device is OFF, with internal 3-MΩ pulldown.
5	GND	G	Ground
6	IN	I	Unregulated input voltage
—	Exposed thermal pad	—	Connect to copper area under the package to improve thermal performance. The use of thermal vias to transfer heat to inner layers of the PCB is recommended. Connect the thermal pad to ground, or leave floating. Do not connect the thermal pad to any potential other than ground.