Table 1. Design Parameters

8.2.1.2.1 External Capacitors

As is common with most regulators, the LP5952 requires external capacitors to ensure stable operation. The LP5952 is specifically designed for portable applications requiring minimum board space and the smallest size components. These capacitors must be correctly selected for good performance.

8.2.1.2.2 Input Capacitor

If the LP5952 is used as a stand-alone device, an input capacitor at V_IN is required for stability. It is recommended that a 1-µF capacitor be connected between the LP5952 power voltage IN pin and ground. (This capacitance value may be increased without limit).

This capacitor must be located a distance of not more than 1 cm from the IN pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.

A capacitor at V_BATT is not required if the distance to the supply does not exceed 5 cm.

If the device is used in the typical application as post regulator after a DC-DC regulator, no input capacitors are required — the capacitors of the DC-DC regulator (C_IN and C_OUT) are sufficient if both components are mounted close to each other and a proper GND plane is used. If the distance between the output capacitor of the DC-DC regulator and the IN pin of the LP5952 is larger than 5 cm, adding an input capacitor at V_IN is recommended.

The equivalent series resistance (ESR) of the input capacitor should be in the range of 3 mΩ to 300 mΩ. The tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance remains ≥ 470 nF over the entire operating temperature range.

8.2.1.2.3 Output Capacitor

The LP5952 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types X7R, Z5U, or Y5V) in the 2.2-µF range (up to 10 µF) and with an ESR between 3 mΩ to 300 mΩ is suitable as C_OUT in the LP5952 application circuit.

This capacitor must be located a distance of not more than 1 cm from the OUT pin and returned to a clean analog ground.

It is also possible to use tantalum or film capacitors at the device output, V_OUT, but these are not as attractive for reasons of size and cost (see Capacitor Characteristics).

8.2.1.2.4 Capacitor Characteristics

The LP5952 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the 1-µF to 4.7-µF range, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high-frequency noise. The ESR of a typical 1-µF ceramic capacitor is in the range of 3 mΩ to 40 mΩ, which easily meets the ESR requirement for stability for the LP5952.

For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly, depending on the operating conditions and capacitor type.

In particular, the output capacitor selection must take account of all the capacitor parameters, to ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size, with smaller sizes giving poorer performance figures in general. Figure 10 shows a typical graph comparing different capacitor case sizes in a capacitance vs. DC Bias plot. As shown Figure 10, increasing the DC-bias condition can result in the capacitance value falling below the minimum value given in Input and Output Capacitors (Recommended) (0.47 µF or 1.5 µF in this case). The graph shows the capacitance out of specification for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor-manufacturer specifications for the nominal value capacitor are consulted for all conditions, as some capacitor sizes (such as 0402) may not be suitable in the actual application.

Figure 10. Typical Variation In Capacitance vs DC Bias

Capacitance of the ceramic capacitor can vary with temperature. The capacitor type X7R, which operates over a temperature range of –55°C to +125°C, only varies the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of –55°C to +85°C. Many large value ceramic capacitors, larger than 1 µF, are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25°C to 85°C. Therefore, X7R is recommended over Z5U and Y5V in applications where the ambient temperature changes significantly above or below 25°C.

Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1-µF to 4.7-µF range.

Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. The ESR of a typical tantalum increases about 2:1 as the temperature goes from 25°C down to –40°C, so some guard band must be allowed.

8.2.1.2.5 Power Dissipation and Device Operation

The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the device, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air.

As stated in the Recommended Operating Conditions, the allowable power dissipation for the device in a given package can be calculated using Equation 1:

With an R_RθJA = 181°C/W, the device in the 5-pin DSBGA package returns a value of 552 mW with a maximum junction temperature of 125°C at T_A of 25°C or 221 mW at T_A of 85°C.

The actual power dissipation across the device can be estimated by Equation 2:

This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. Equation 1 and Equation 2 must be used to determine the optimum operating conditions for the device in any application. As an example, to keep full load current capability of 350 mA for a 1.5-V output voltage option at a high ambient temperature of 85°C, V_IN has to be kept ≤ 2.1 V (for DSBGA package):

Figure 11 shows the output current derating due to these considerations:

TA = 85°C	VOUT = 1.5 V
RθJA(DSBGA) = 181°C/W	RθJA(USON) = 181.6°C/W

Figure 11. Maximum Load Current vs V_IN – V_OUT

The typical contribution of the bias input voltage supply V_BATT to the power dissipation can be neglected (Equation 4):