SNVS857 February   2014 LP8555

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Terminal Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Serial Bus Timing Parameters (FSET/SDA, ISET/SCL)
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Features Description
      1. 8.3.1 Boost Converter Overview
        1. 8.3.1.1 Operation
        2. 8.3.1.2 Protection
        3. 8.3.1.3 Setting Boost Switching Frequency
        4. 8.3.1.4 Adaptive Boost Output Voltage Control
        5. 8.3.1.5 EMI Reduction
      2. 8.3.2 Brightness Control
        1. 8.3.2.1 PWM Input Duty Measurement
        2. 8.3.2.2 BRTMODE = 00
        3. 8.3.2.3 BRTMODE = 01
        4. 8.3.2.4 BRTMODE = 10
        5. 8.3.2.5 BRTMODE = 11
        6. 8.3.2.6 Hybrid PWM and Current Dimming Control
        7. 8.3.2.7 Setting PWM Dimming Frequency
        8. 8.3.2.8 Setting Full-Scale LED Current
        9. 8.3.2.9 Phase-Shift PWM Scheme
      3. 8.3.3 LED Brightness Slopes, Normal and Advanced
      4. 8.3.4 Start-up and Shutdown Sequences
        1. 8.3.4.1 Start-up With PWM Input Brightness Control Mode (BRTMODE = 00b)
        2. 8.3.4.2 Shutdown With PWM Input Brightness Control Mode (BRTMODE = 00b)
        3. 8.3.4.3 Start-up With I2C Brightness Control Mode (BRTMODE = 01b)
        4. 8.3.4.4 Shutdown With I2C Brightness Control Mode (BRTMODE = 01b)
        5. 8.3.4.5 Start-up with I2C + PWM Input Brightness Control Mode (BRTMODE = 10 or 11b)
        6. 8.3.4.6 Shutdown with I2C + PWM Input Brightness Control Mode (BRTMODE = 10 or 11b)
      5. 8.3.5 LED String Count Auto Detection
      6. 8.3.6 Fault Detection
        1. 8.3.6.1 LED Short Detection
        2. 8.3.6.2 LED Open Detection
        3. 8.3.6.3 Undervoltage Detection
        4. 8.3.6.4 Thermal Shutdown
        5. 8.3.6.5 Boost Overcurrent Protection
        6. 8.3.6.6 Boost Overvoltage Protection
        7. 8.3.6.7 Boost Undervoltage Protection
      7. 8.3.7 I2C-Compatible Serial Bus Interface
        1. 8.3.7.1 Interface Bus Overview
        2. 8.3.7.2 Data Transactions
        3. 8.3.7.3 Acknowledge Cycle
        4. 8.3.7.4 “Acknowledge After Every Byte” Rule
        5. 8.3.7.5 Addressing Transfer Formats
        6. 8.3.7.6 Control Register Write Cycle
        7. 8.3.7.7 Control Register Read Cycle
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation Without I2C Control
      2. 8.4.2 Operation With I2C Control
      3. 8.4.3 Shutdown Mode
      4. 8.4.4 Standby Mode
      5. 8.4.5 Active Mode
    5. 8.5 Register Maps
      1. 8.5.1  COMMAND
      2. 8.5.2  STATUS/MASK
      3. 8.5.3  BRTLO
      4. 8.5.4  BTHI
      5. 8.5.5  CONFIG
      6. 8.5.6  CURRENT
      7. 8.5.7  PGEN
      8. 8.5.8  BOOST
      9. 8.5.9  LEDEN
      10. 8.5.10 STEP
      11. 8.5.11 Brightness Transitions, Typical Times
      12. 8.5.12 VOLTAGE_0
      13. 8.5.13 LEDEN1
      14. 8.5.14 VOLTAGE1
      15. 8.5.15 OPTION
      16. 8.5.16 EXTRA
      17. 8.5.17 ID
      18. 8.5.18 REVISION
      19. 8.5.19 CONF0
      20. 8.5.20 CONF1
      21. 8.5.21 VHR0
      22. 8.5.22 VHR1
      23. 8.5.23 JUMP
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application for Default LP8555YFQR EPROM Configuration
        1. 9.2.1.1 Schematic
        2. 9.2.1.2 LP8555YFQR EPROM Configuration
        3. 9.2.1.3 Design Requirements
        4. 9.2.1.4 Detailed Design Procedure
          1. 9.2.1.4.1 Inductor
          2. 9.2.1.4.2 Output Capacitor
          3. 9.2.1.4.3 LDO Capacitor
          4. 9.2.1.4.4 VDD Capacitor
          5. 9.2.1.4.5 Boost Input Capacitor
          6. 9.2.1.4.6 Diode
        5. 9.2.1.5 Application Performance Plots
      2. 9.2.2 Application Example With Different LED Configuration for Each Bank
        1. 9.2.2.1 Schematic
      3. 9.2.3 Application Example With 12 LED Strings and PWM Input Brightness Control
        1. 9.2.3.1 Schematic
      4. 9.2.4 Application With 12 LED Strings, I2C Brightness Control
        1. 9.2.4.1 Schematic
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12 Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Terminal Configuration and Functions

YFQ (DSBGA)
36 Bumps
po_snvs857.gif

Terminal Functions

TERMINAL TYPE DESCRIPTION
NUMBER NAME
A1, A2, A3, B1, B2, B3, LEDAx A LED Bank A Current Sink Terminal. If unused, this terminal may be left floating.
A4, A5, A6, B4, B5, B6 LEDBx A LED Bank A Current Sink Terminal. If unused, this terminal may be left floating.
C1 FB_A A Feedback terminal for the Bank A Boost Converter.
C2 PWM/INT I Dual function terminal. When BRTMODE = 00, 10, or 11, this is a PWM input terminal. When BRTMODE = 01, this terminal is a programmable interrupt terminal. In this mode, this is an open drain output that pulls low when a fault condition occurs.
C3, C4, D3, D4 GND G Ground for analog and digital blocks. These terminals should be connected to a noise-free GND plane if possible (separate plane than GND_SW_x terminals).
C5 EN/VDDIO I Backlight Enable terminal and VDDIO power terminal + reference terminal for I2C communication. This terminal should be connected to IO voltage with low impedance route to avoid voltage ripple on this terminal.
C6 FB_B A Feedback terminal for the Bank B Boost Converter.
D1, E1, F1 SW_A A Bank A Boost Converter Switch
D2, E2, F2 GND_SW_A G Bank A Boost Converter Switch Ground. These terminals can be connected to noisy GND due to high current spikes.
D5, E5, F5 GND_SW_B G Bank B Boost Converter Switch Ground. These terminals can be connected to noisy GND due to high current spikes.
D6, E6, F6 SW_B A Bank B Boost Converter Switch
E3 FSET/SDA I/O/A Dual Function terminal. When I2C is not used (for example, BRTMODE = 00), this terminal can be used to set the boost switching frequency and/or LED PWM frequency by connecting a resistor between the terminal and a ground reference. When I2C is used (for example, BRTMODE = 01, 10, or 11), this terminal is connected to a SDA line of an I2C bus.
E4 ISET/SCL I/A Dual Function terminal. When I2C is not used (for example, if BRTMODE=00), this terminal can be used to set the full-scale LED current by connecting a resistor between the terminal and a ground reference. When I2C is used (for example, BRTMODE = 01, 10, or 11), this terminal is connected to a SCL line of an I2C bus.
F3 VLDO P Internal LDO Output terminal. CVLDO bypass capacitor must be connected between this terminal and ground.
F4 VDD P Device power supply terminal. Provide 2.7-V to 20-V supply to this terminal. This terminal is an input of the internal LDO regulator. The output of the internal LDO powers the device blocks.
A: Analog, G: Ground Terminal, P: Power Terminal, I: Input Terminal, O: Output Terminal