SNVSAT4A September   2017  – June 2021 LP873220-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Serial Bus Timing Parameters
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  DC/DC Converters
        1. 7.3.1.1 Overview
        2. 7.3.1.2 Transition Between PWM and PFM Modes
        3. 7.3.1.3 Buck Converter Load Current Measurement
        4. 7.3.1.4 Spread-Spectrum Mode
      2. 7.3.2  Sync Clock Functionality
      3. 7.3.3  Low-Dropout Linear Regulators (LDOs)
      4. 7.3.4  Power-Up
      5. 7.3.5  Regulator Control
        1. 7.3.5.1 Enabling and Disabling Regulators
        2. 7.3.5.2 Changing Output Voltage
      6. 7.3.6  Enable and Disable Sequences
      7. 7.3.7  Device Reset Scenarios
      8. 7.3.8  Diagnosis and Protection Features
        1. 7.3.8.1 Power-Good Information (PGOOD pin)
          1. 7.3.8.1.1 PGOOD Pin Gated Mode
          2. 7.3.8.1.2 PGOOD Pin Continuous Mode
          3. 7.3.8.1.3 PGOOD Pin Inactive Mode
        2. 7.3.8.2 Warnings for Diagnosis (Interrupt)
          1. 7.3.8.2.1 Output Power Limit
          2. 7.3.8.2.2 Thermal Warning
        3. 7.3.8.3 Protection (Regulator Disable)
          1. 7.3.8.3.1 Short-Circuit and Overload Protection
          2. 7.3.8.3.2 Overvoltage Protection
          3. 7.3.8.3.3 Thermal Shutdown
        4. 7.3.8.4 Fault (Power Down)
          1. 7.3.8.4.1 Undervoltage Lockout
      9. 7.3.9  Operation of the GPO Signals
      10. 7.3.10 Digital Signal Filtering
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
    5. 7.5 Programming
      1. 7.5.1 I2C-Compatible Interface
        1. 7.5.1.1 Data Validity
        2. 7.5.1.2 Start and Stop Conditions
        3. 7.5.1.3 Transferring Data
        4. 7.5.1.4 I2C-Compatible Chip Address
        5. 7.5.1.5 Auto-Increment Feature
    6. 7.6 Register Maps
      1. 7.6.1 Register Descriptions
        1. 7.6.1.1  DEV_REV
        2. 7.6.1.2  OTP_REV
        3. 7.6.1.3  BUCK0_CTRL_1
        4. 7.6.1.4  BUCK0_CTRL_2
        5. 7.6.1.5  BUCK1_CTRL_1
        6. 7.6.1.6  BUCK1_CTRL_2
        7. 7.6.1.7  BUCK0_VOUT
        8. 7.6.1.8  BUCK1_VOUT
        9. 7.6.1.9  LDO0_CTRL
        10. 7.6.1.10 LDO1_CTRL
        11. 7.6.1.11 LDO0_VOUT
        12. 7.6.1.12 LDO1_VOUT
        13. 7.6.1.13 BUCK0_DELAY
        14. 7.6.1.14 BUCK1_DELAY
        15. 7.6.1.15 LDO0_DELAY
        16. 7.6.1.16 LDO1_DELAY
        17. 7.6.1.17 GPO_DELAY
        18. 7.6.1.18 GPO2_DELAY
        19. 7.6.1.19 GPO_CTRL
        20. 7.6.1.20 CONFIG
        21. 7.6.1.21 PLL_CTRL
        22. 7.6.1.22 PGOOD_CTRL_1
        23. 7.6.1.23 PGOOD_CTRL_2
        24. 7.6.1.24 PG_FAULT
        25. 7.6.1.25 RESET
        26. 7.6.1.26 INT_TOP_1
        27. 7.6.1.27 INT_TOP_2
        28. 7.6.1.28 INT_BUCK
        29. 7.6.1.29 INT_LDO
        30. 7.6.1.30 TOP_STAT
        31. 7.6.1.31 BUCK_STAT
        32. 7.6.1.32 LDO_STAT
        33. 7.6.1.33 TOP_MASK_1
        34. 7.6.1.34 TOP_MASK_2
        35. 7.6.1.35 BUCK_MASK
        36. 7.6.1.36 LDO_MASK
        37. 7.6.1.37 SEL_I_LOAD
        38. 7.6.1.38 I_LOAD_2
        39. 7.6.1.39 I_LOAD_1
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Inductor Selection
        2. 8.2.1.2 Buck Input Capacitor Selection
        3. 8.2.1.3 Buck Output Capacitor Selection
        4. 8.2.1.4 LDO Input Capacitor Selection
        5. 8.2.1.5 LDO Output Capacitor Selection
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3 Application Curves

Measurements are done using typical application set up with connections shown in Figure 8-1. Graphs may not reflect the OTP default settings. Unless otherwise specified: V(VIN_Bx) = V(VIN_LDOx) = V(VANA) = 3.7 V, VOUT_Bx = 1 V, VOUT_LDOx = 1 V, TA = 25°C, L = 0.47 µH (TOKO DFE252012PD-R47M), COUT_BUCK = 22 µF , and CPOL_BUCK = 22 µF, COUT_LDO = 1 µF.

GUID-E8CC8AC8-E843-43F8-B374-7FAC861FBD6A-low.gif
VOUT = 1.8 V
Figure 8-2 Buck Efficiency in PFM/PWM and Forced PWM Mode
GUID-824D553E-CCCD-4155-9A11-BEAB74D393A3-low.gif
VIN = 5 V
Figure 8-4 Buck Efficiency in Forced PWM Mode
GUID-3CDA79FE-F644-4B13-9587-F7479F0EC229-low.gif
VOUT = 1 V
Figure 8-6 Buck Output Voltage vs Load Current in PFM/PWM Mode
GUID-C83F71FD-69A3-464F-B8EC-371D65889284-low.gif
Load = 1 A (PWM) and 0.1 A (PFM)
Figure 8-8 Buck Output Voltage vs Temperature
GUID-460716F1-4889-46A6-9643-401170BEC388-low.png
Slew-rate = 10 mV/µs RLOAD = 1 Ω VOUT = 1 V
Figure 8-10 Buck Start-Up with EN1, Forced PWM Mode
GUID-72A18015-AAF8-45E1-AD8F-CCB858431D95-low.png
IOUT = 10 mA
Figure 8-12 Buck Output Voltage Ripple, PFM Mode
GUID-B27EE337-A3BE-40FC-96A0-9A941EE4AC40-low.pngFigure 8-14 Buck Transient From PFM-to-PWM Mode
GUID-7AD0E40D-FBFB-4244-A7DB-D9F1EE1DE925-low.png
IOUT = 0.1 A → 2 A → 0.1 A TR = TF = 400 ns
Figure 8-16 Buck Transient Load Step Response, AUTO Mode
GUID-79B7EA11-1FAD-485E-BB71-DAF699BE88F4-low.gifFigure 8-18 Buck VOUT Transition from 0.6 V to 1.4 V With Different Slew Rate Settings
GUID-5368822F-DF1B-4F3C-97AF-1FFBA896DCA7-low.pngFigure 8-20 Buck Start-Up With Short on Output
GUID-78C2F99C-A33B-4E7B-9950-31C1E1C83896-low.gif
VOUT = 1 V Load = 200 mA
Figure 8-22 LDO Output Voltage vs Input Voltage
GUID-70D0B8A6-62DF-422D-A796-323D3B4945E3-low.png
ILOAD = 0 A VOUT = 1 V
Figure 8-24 LDO Start-Up
GUID-9B29D5B7-0156-4A9D-BEB2-64899192508F-low.png
ILOAD = 0 A VOUT = 1 V
Figure 8-26 LDO Shutdown
GUID-537B55A0-0522-4DEA-B170-87A8D3A31DFA-low.pngFigure 8-28 LDO VOUT Transition from 1.8 V to 1.2 V
GUID-5C8C3B51-BF15-4002-856A-BE810D5C57AC-low.png
Start-up delay is 500 µs
Figure 8-30 LDO Start-Up With Short on Output
GUID-98DC06BA-2A17-4B02-AF92-352297BCF682-low.gif
VIN = 3.3 V
Figure 8-3 Buck Efficiency in Forced PWM Mode
GUID-E045FA09-5E1F-4DEF-BE77-641B82BDFA27-low.gif
VOUT = 1 V
Figure 8-5 Buck Output Voltage vs Load Current in Forced PWM Mode
GUID-FE4BA35B-55F5-4C8E-B037-4C11FAC785E7-low.gif
VOUT = 1 V Load = 1 A
Figure 8-7 Buck Output Voltage vs Input Voltage in PWM Mode
GUID-32501F3C-A7C6-4542-838A-6A74CBC1EF87-low.png
Slew-rate = 10 mV/µs ILOAD = 0 A VOUT = 1 V
Figure 8-9 Buck Start-Up With EN1, Forced PWM Mode
GUID-EEACC0FF-D96E-4EE6-8E6A-5F90C0CAE721-low.png
Slew-rate = 10 mV/µs RLOAD = 1 Ω VOUT = 1 V
Figure 8-11 Buck Shutdown With EN1, Forced PWM Mode
GUID-7BA8DAA6-54D1-4A16-9A3A-F409FC9C0099-low.png
IOUT = 200 mA
Figure 8-13 Buck Output Voltage Ripple, Forced PWM Mode
GUID-120FC01E-0FAF-429E-B9AA-DDFDE0CBEBBD-low.pngFigure 8-15 Buck Transient From PWM-to-PFM Mode
GUID-BD49EB62-BD2F-47EC-BE9D-23494DA42E9A-low.png
IOUT = 0.1 A → 2 A → 0.1 A TR = TF = 400 ns
Figure 8-17 Buck Transient Load Step Response, Forced PWM Mode
GUID-55F0D1E5-4CFA-4286-8A79-D67C7DD84D90-low.gifFigure 8-19 Buck VOUT Transition from 1.4 V to 0.6 V With Different Slew Rate Settings
GUID-3212C0D7-1A40-4645-A37B-1A7D4114CBA5-low.gif
VOUT = 1 V
Figure 8-21 LDO Output Voltage vs Load Current
GUID-A3A19E27-F080-4857-BD7D-AD3C8127CA7F-low.gif
VOUT = 1 V Load = 200 mA
Figure 8-23 LDO Output Voltage vs Temperature
GUID-3BBFD0C2-5146-452A-B31F-769030A955CA-low.png
RLOAD = 3.3 Ω VOUT = 1 V
Figure 8-25 LDO Start-Up
GUID-36F38F8C-DB8B-4E13-B514-F1C4E65D4BC2-low.png
IOUT = 0 A → 0.3 A → 0 A TR = TF = 1 µs
Figure 8-27 LDO Transient Load Step Response
GUID-A3CB394A-0C80-47A9-B922-3053AE9A2CBD-low.pngFigure 8-29 LDO VOUT Transition from 1.2 V to 1.8 V