SNVSBK2A September 2019 – June 2021 LP8733
PRODUCTION DATA
LDO1_DELAY is shown in Table 7-39, Address: 0x0F
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
LDO1_SHUTDOWN_DELAY[3:0] | LDO1_STARTUP_DELAY[3:0] |
Bits | Field | Type | Default | Description |
---|---|---|---|---|
7:4 | LDO1_ SHUTDOWN_ DELAY[3:0] | R/W | X | Shutdown delay of the LDO1 from the EN signal's falling edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) |
3:0 | LDO1_ STARTUP_ DELAY[3:0] | R/W | X | Startup delay of the LDO1 from the EN signal's rising edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) |