SNVSCV7 October   2024 LP8762-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Typical Applications
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Option Addendum
    2. 10.2 Tape and Reel Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RQK|32
Thermal pad, mechanical data (Package|Pins)

1 Features

  • AEC-Q100 qualified with the following results:
    • Input voltage: 2.8V to 5.5V
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD classification Level 2
    • Device CDM ESD classification Level C4B
  • Functional safety-compliant
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 system design up to ASIL-D
    • Documentation available to aid IEC 61508 system design up to SIL-3
    • Systematic capability up to ASIL-D
    • Hardware integrity up to ASIL-D
    • Windowed voltage and over-current monitors
    • Watchdog with selectable trigger / Q&A mode
    • Level or PWM error signal monitoring (ESM)
    • Thermal monitoring with high temperature warning and thermal shutdown
    • Bit-integrity (CRC) error detection on configuration registers and non-volatile memory
  • Four high-efficiency step-down DC/DC converters:
    • Output voltage: 0.3V to 3.34V (0.3V to 1.9V for multi-phase outputs)
    • Maximum output current: 3A per phase, up to 12A with 4-phase configuration
    • Programmable output voltage slew-rate: 0.5mV/µs to 33mV/µs
    • Switching frequency: 2.2MHz or 4.4MHz
  • Ten configurable general purpose I/O (GPIO)
  • SPMI interface for multi-PMIC synchronization
  • Input overvoltage monitor (OVP) and undervoltage lockout (UVLO)

LP8762-Q1 Simplified SchematicSimplified Schematic