SNVSC48B October 2021 – June 2024 LP87743-Q1 , LP87744-Q1 , LP87745-Q1
PRODUCTION DATA
- 1
- 1Features
- 2Applications
- 3Description
- 4Description (continued)
- 5Pin Configuration and Functions
- 6Device and Documentation Support
- 7Revision History
- 8Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
- RXV|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information
4 Description (continued)
The LP8774x-Q1 device supports programmable start-up and shutdown delays and sequences which are synchronized to the ENABLE signal. The sequences can also include GPO signals to control external regulators, load switches, and processor reset. The default settings for the device are programmed into nonvolatile memory (NVM). The device controls the output slew rate to minimize output voltage overshoot and in-rush current during device start-up.
This data sheet applies to the superset device, including all register settings, as was validated and covers the following generic part number LP8774x-Q1 with orderable part numbers LP8774xyzzRXVRQ1where:
Figure 4-1 LP8774x-Q1 Orderable Part Numbers Scheme