SNVSA50C August   2015  – May 2017 LP8861-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Internal LDO Electrical Characteristics
    7. 7.7  Protection Electrical Characteristics
    8. 7.8  Power Line FET Control Electrical Characteristics
    9. 7.9  Current Sinks Electrical Characteristics
    10. 7.10 PWM Brightness Control Electrical Characteristics
    11. 7.11 Boost/SEPIC Converter Characteristics
    12. 7.12 Logic Interface Characteristics
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Integrated Boost/SEPIC Converter
      2. 8.3.2 Internal LDO
      3. 8.3.3 LED Current Sinks
        1. 8.3.3.1 Current Sink Configuration
        2. 8.3.3.2 Current Setting
        3. 8.3.3.3 Brightness Control
      4. 8.3.4 Power-Line FET Control
      5. 8.3.5 LED Current Dimming With External Temperature Sensor
      6. 8.3.6 Protection and Fault Detection
        1. 8.3.6.1 Adaptive Boost Control and Functionality of LED Fault Comparators
        2. 8.3.6.2 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device States
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application for 4 LED Strings
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 LDO Output Capacitor
          5. 9.2.1.2.5 Diode
          6. 9.2.1.2.6 Power Line Transistor
          7. 9.2.1.2.7 Input Current Sense Resistor
        3. 9.2.1.3 Application Curves
      2. 9.2.2 High Output Current Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SEPIC Mode Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 Diode
          2. 9.2.3.2.2 Inductor
        3. 9.2.3.3 Application Curves
      4. 9.2.4 Application with Temperature Based LED Current De-rating
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
      1. 13.1.2 Tape and Reel Information
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

PWP Package
20-Pin TSSOP with Exposed Thermal Pad
Top View
LP8861-Q1 pinout_SNVSA50.gif

Pin Functions

PIN TYPE(1) DESCRIPTION
NUMBER NAME
1 VIN P Input power pin as well as the positive input for an optional current-sense resistor.
2 LDO A Output of internal LDO; connect a 1-μF decoupling capacitor between this pin and noise-free ground.
3 FSET A Boost/SEPIC switching frequency setting resistor; for normal operation, resistor value from 24 kΩ to 219 kΩ must be connected between this pin and ground.
4 VDDIO/EN I Enable input for the device as well as supply input (VDDIO) for digital pins
5 FAULT OD Fault signal output.
If unused, the pin may be left floating.
6 SYNC I Input for synchronizing boost/SEPIC.
If synchronization is not used, connect this pin to GND to disable spread spectrum or to VDDIO/EN to enable spread spectrum.
7 PWM I PWM dimming input.
8 TSENSE A Input for NTC bridge. Refer to LED Current Dimming With External Temperature Sensor for proper connection. If unused, the pin must be left floating.
9 TSET A Input for NTC bridge. Refer to LED Current Dimming With External Temperature Sensor for proper connection. This pin must be connected to GND if not used.
10 ISET A LED current setting resistor; for normal operation, resistor value from 24 kΩ to 129 kΩ must be connected between this pin and ground.
11 GND G Ground.
12 OUT4 A Current sink output.
This pin must be connected to GND if not used.
13 OUT3 A Current sink output.
This pin must be connected to GND if not used.
14 OUT2 A Current sink output.
This pin must be connected to GND if not used.
15 OUT1 A Current sink output.
This pin must be connected to GND if not used.
16 FB A Boost/SEPIC feedback input; for normal operation this pin must be connected to the middle of a resistor divider between VOUT and ground using feedback resistor values from 5 kΩ to 150 kΩ.
17 PGND G Boost/SEPIC power ground.
18 SW A Boost/SEPIC switch pin.
19 SD A Power-line FET control.
If unused, the pin may be left floating.
20 VSENSE_N A Input current sense pin. Connect to VIN pin when optional input current sense resistor is not used.
(1) A: Analog pin, G: Ground pin, P: Power pin, I: Input pin, I/O: Input/Output pin, O: Output pin, OD: Open Drain pin