SLVSH05 November 2023 LP8865U-Q1 , LP8865V-Q1 , LP8865W-Q1 , LP8865X-Q1 , LP8865Y-Q1 , LP8865Z-Q1
PRODUCTION DATA
The LP8865 family supports analog dimming which regulates the LED current through the ADIM/HD pin. The analog dimming mode is enabled when the PWM/EN pin is always high and the ADIM/HD pin is configured by a PWM input signal. And the internal digital circuits is able to respond to the duty cycle change of the PWM input signal with tens of micro-seconds delay
The internal voltage reference, VREF, changes in proportion to the duty cycle of the PWM input signal at the ADIM/HD pin. VREF is 200 mV when the PWM input signal at the ADIM/HD pin has a 100% duty cycle, for instance, and VREF is 20 mV when the PWM input signal has a 10% duty cycle.