SNVS542E May   2008  – June 2016 LP8900

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Default Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable (EN)
      2. 8.4.2 Minimum Operating Input Voltage (VIN)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Capacitors
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 No-Load Stability
        5. 9.2.2.5 Capacitor Characteristics
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 DSBGA Mounting
    4. 11.4 DSBGA Light Sensitivity
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The LP8900 is designed to meet the requirements of RF and analog circuits, providing low device noise, high PSRR, low quiescent current, and superior line transient response. The device offers class-leading device noise performance without a noise bypass capacitor and is stable with input and output capacitors with a value of 1 µF. The LP8900 delivers this performance in an industry standard DSBGA package which, for this device, is specified with an operating junction temperature (TJ) of –40°C to +125°C.

9.2 Typical Application

LP8900 30039302.gif Figure 11. LP8900 Typical Application

9.2.1 Design Requirements

Some of the design requirements for this dual linear regulator include:

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Minimum input voltage 1.8 V
Minimum output voltage 1.2 V
Output current 200 mA/Channel

Table 2. Recommended Capacitor Specifications

PARAMETER TEST CONDITIONS MIN(1) TYP(1) MAX(1) UNIT
CIN Input capacitor Capacitance(2) 0.33 1 10 µF
COUT Output capacitor 0.33 1 4.7 µF
ESR 5 500
(1) Typical values apply for TA = 25°C; minimim and maximum values apply over the full junction temperature range for operation, −40 to +125°C, unless otherwise specified.
(2) The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered when selecting a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is X7R or X5R. (See External Capacitors.)

9.2.2 Detailed Design Procedure

9.2.2.1 External Capacitors

In common with most regulators, the LP8900 requires external capacitors for regulator stability. The LP8900 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance.

9.2.2.2 Input Capacitor

An input capacitor is required for stability. It is recommended that a 1-µF capacitor be connected between the LP8900 IN pin and ground. (This capacitance value may be increased to 10 µF.)

This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.

NOTE

Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application.

There are no requirements for the equivalent series resistance (ESR) on the input capacitor, but tolerance, temperature, and voltage coefficients must be considered when selecting the capacitor to ensure the capacitance remains ≊ 1 µF over the entire operating temperature range.

9.2.2.3 Output Capacitor

Correct selection of the output capacitor is critical to ensure stable operation in the intended application.

The output capacitor must meet all the requirements specified in the recommended capacitor table over all conditions in the application. These conditions include DC bias, frequency and temperature. Unstable operation results if the capacitance drops below the minimum specified value.

The LP8900 is designed specifically to work with very small ceramic output capacitors. A 1-µF ceramic capacitor (dielectric type X7R or X5R) with an ESR between 5 mΩ to 500 mΩ, is suitable in the LP8900 application circuit.

Other ceramic types such as Y5V and Z5U are less suitable owing to their inferior temperature characteristics. (See Capacitor Characteristics.)

It is also recommended that the output capacitor is placed within 1 cm of the output pin and returned to a clean, low impedance, ground connection.

It is possible to use tantalum or film capacitors at the device output, OUT, but these are not as attractive for reasons of size and cost. (See Capacitor Characteristics.)

9.2.2.4 No-Load Stability

The LP8900 remains stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications.

9.2.2.5 Capacitor Characteristics

The LP8900 is designed to work with ceramic capacitors on the input and outputs to take advantage of the benefits they offer. For capacitance values around 1 µF, ceramic capacitors give the circuit designer the best design options in terms of low cost and minimal area.

For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly dependant on the conditions of operation and capacitor type.

In particular, to ensure stability, the output capacitor selection must take account of all the capacitor parameters, to ensure that the specification is met within the application. Capacitance value can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values may also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size with smaller sizes giving poorer performance figures in general.

LP8900 30039340.gif Figure 12. Effect of DC Bias on Capacitance Value

As an example Figure 12 shows a typical graph showing a comparison of capacitor case sizes in a capacitance vs. DC bias plot. As shown in Figure 12, as a result of the DC bias condition, the capacitance value may drop below the minimum capacitance value given in Table 2. Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor manufacturers' specifications for the nominal value capacitor are consulted for all conditions as some capacitor sizes (for example, 0402) may not be suitable in the actual application. Ceramic capacitors have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 4.7-µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability for the LP8900. The temperature performance of ceramic capacitors varies by type. Capacitor type X7R is specified with a tolerance of ±15% over the temperature range –55°C to +125°C. The X5R has a similar tolerance over the reduced temperature range of –55°C to +85°C. Some large value ceramic capacitors (4.7 µF) are manufactured with Z5U or Y5V temperature characteristics, which can result in the capacitance dropping by more than 50% as the temperature varies from 25°C to 85°C. Therefore, X7R or X5R types are recommended in applications where the temperature changes significantly above or below 25°C.

Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1-µF to 4.7-µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. The ESR of a typical tantalum increases about 2:1 as the temperature goes from 25°C down to –40°C, so some guard band must be allowed.

9.2.3 Application Curves

LP8900 30039321.png
1 to 200 mA
Figure 13. OUT1 Load Transient
LP8900 30039320.png
Figure 15. Load Transient
LP8900 30039319.png
0 to 200 mA
Figure 14. OUT1 Load Transient
LP8900 30039323.png
200 mA per channel
Figure 16. Line Transient
LP8900 30039325.png
Figure 17. Enable Start-Up Characteristics
LP8900 30039326.png Figure 19. Shutdown Characteristics
LP8900 30039342.png Figure 18. VIN and EN Tied Together