LPV801/LPV802 320 nA Nanopower Operational Amplifiers
- SNOSCZ3B August 2016 – November 2016 LPV801 , LPV802
  
  PRODUCTION DATA.

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DATA SHEET

LPV801/LPV802 320 nA Nanopower Operational Amplifiers

1 Features

Nanopower Supply Current: 320 nA/channel
Offset Voltage: 3.5 mV (max)
TcVos: 1 µV/°C
Unity Gain-Bandwidth: 8 kHz
Wide Supply Range: 1.6 V to 5.5 V
Low Input Bias Current : 0.1 pA
Unity-Gain Stable
Rail-to-Rail Output
No Output Reversals
EMI Protection
Temperature Range: –40°C to 125°C
Industry Standard Packages:
- Single in 5-pin SOT-23
- Dual in 8-pin VSSOP

2 Applications

CO and O₂ Gas Detectors (TIDA-00854)
PIR Motion Detectors (TIDA-00489)
Ionization Smoke Alarms
Thermostats
IoT Remote Sensors
Active RFID Readers and Tags
Portable Medical Equipment

3 Description

The LPV801 (single) and LPV802 (dual) comprise a family of ultra-low-power operational amplifiers for sensing applications in battery powered wireless and low power wired equipment. With 8kHz of bandwidth from 320nA of quiescent current, the LPV80x amplifiers minimize power consumption in equipment such as CO detectors, smoke detectors and PIR motion detectors where operational battery-life is critical.

In addition to being ultra-low-power, the LPV80x amplifiers have CMOS input stages with typically femto-amp bias currents. The LPV80x amplifiers also feature a negative-rail sensing input stage and a rail-to-rail output stage that is capable of swinging within millivolts of the rails, maintaining the widest dynamic range possible. EMI protection is designed into the LPV80x in order to reduce system sensitivity to unwanted RF signals from mobile phones, WiFi, radio transmitters and tag readers.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE
LPV801	SOT-23 (5)	2.90 mm x 1.60 mm
LPV802	VSSOP (8)	3.00 mm × 3.00 mm

(1) For all available packages, see the orderable addendum at the end of the data sheet.

LPV8xx Family of Nanopower Amplifiers

PART NUMBER	CHANNELS	SUPPLY CURRENT (Typ/Ch)	OFFSET VOLTAGE (Max)
LPV801	1	450 nA	3.5 mV
LPV802	2	320 nA	3.5 mV
LPV811	1	450 nA	370 µV
LPV812	2	425 nA	300 µV

Nanopower Amplifier in Electrochemical Sensor

Nanopower Amplifier in PIR Motion Detector

4 Revision History

Changes from A Revision (August 2016) to B Revision

Changed LPV811 Typ Offset Voltage and LPV812 Typ Supply Current in LPV8xx Family table Go
Deleted LPV801 "Specs Prelim until Release" footnote Go
Added seporate CMRR line for LPV801 Go
Changed LPV801 Typical and Maximum Supply Current Go

Changes from * Revision (August 2016) to A Revision

Changed Product Preview to Production DataGo

5 Pin Configuration and Functions

LPV801 5-Pin SOT-23

DBV Package

Top View

LPV802 8-Pin VSSOP

DGK Package

Top View

LPV801 LPV802 po_2333_so_msop_bos351.gif

Pin Functions: LPV801 DBV

PIN		I/O	DESCRIPTION
NAME	NUMBER	I/O	DESCRIPTION
OUT	1	O	Output
-IN	4	I	Inverting Input
+IN	3	I	Non-Inverting Input
V-	2	P	Negative (lowest) power supply
V+	5	P	Positive (highest) power supply

Pin Functions: LPV802 DGK

PIN		I/O	DESCRIPTION
NAME	NUMBER	I/O	DESCRIPTION
OUT A	1	O	Channel A Output
-IN A	2	I	Channel A Inverting Input
+IN A	3	I	Channel A Non-Inverting Input
V-	4	P	Negative (lowest) power supply
+IN B	5	I	Channel B Non-Inverting Input
-IN B	6	I	Channel B Inverting Input
OUT B	7	O	Channel B Output
V+	8	P	Positive (highest) power supply

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

			MIN	MAX	UNIT
Supply voltage, V_s = (V+) - (V-)			–0.3	6	V
Input pins	Voltage ⁽²⁾ ⁽³⁾	Common mode	(V-) - 0.3	(V+) + 0.3	V
Input pins		Differential	(V-) - 0.3	(V+) + 0.3	V
Input pins	Current		-10	10	mA
Output short current ⁽⁴⁾			Continuous	Continuous
Operating temperature			–40	125	°C
Storage temperature, T_stg			–65	150	°C
Junction temperature				150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Not to exceed -0.3V or +6.0V on ANY pin, referred to V-

(3) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current-limited to 10 mA or less.

(4) Short-circuit to Vs/2, one amplifer per package. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±1000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±250	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. Pins listed as ±750 V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
Supply voltage (V+ – V–)		1.6		5.5	V
Specified temperature		-40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LPV801 DBV (SOT-23) 5 PINS	LPV802 DGK (VSSOP) 8 PINS	UNIT
θ_JA	Junction-to-ambient thermal resistance	177.4	184.2	ºC/W
θ_JCtop	Junction-to-case (top) thermal resistance	133.9	75.3
θ_JB	Junction-to-board thermal resistance	36.3	105.5
ψ_JT	Junction-to-top characterization parameter	23.6	13.5
ψ_JB	Junction-to-board characterization parameter	35.7	103.9

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

T_A = 25°C, V_S= 1.8V to 5 V, V_CM = V_OUT = V_S/2, and R_L≥ 10 MΩ to V_S/ 2, unless otherwise noted.

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
OFFSET VOLTAGE
V_OS	Input offset voltage	V_S = 1.8V, 3.3V, and 5V, V_CM = V-			0.55	±3.5	mV
V_OS	Input offset voltage	V_S = 1.8V, 3.3V, and 5V, V_CM = (V+) – 0.9 V			0.55	±3.5	mV
ΔV_OS/ΔT	Input offset drift	V_CM = V-	T_A = –40°C to 125°C		1		µV/°C
PSRR	Power-supply rejection ratio	V_S = 1.8V to 5V, V_CM = V-			1.6	60	µV/V
INPUT VOLTAGE RANGE
V_CM	Common-mode voltage range	V_S = 5 V		0		4.1	V
CMRR	Common-mode rejection ratio, LPV801	(V–) ≤ V_CM ≤ (V+) – 0.9 V, V_S= 5V		77	95		dB
CMRR	Common-mode rejection ratio, LPV802	(V–) ≤ V_CM ≤ (V+) – 0.9 V, V_S= 5V		80	98		dB
INPUT BIAS CURRENT
I_B	Input bias current	V_S = 1.8V			±100		fA
I_OS	Input offset current	V_S = 1.8V			±100		fA
INPUT IMPEDANCE
	Differential				7		pF
	Common mode				3		pF
NOISE
E_n	Input voltage noise	ƒ = 0.1 Hz to 10 Hz			6.5		µVp-p
e_n	Input voltage noise density	ƒ = 100 Hz			340		nV/√Hz
e_n	Input voltage noise density	ƒ = 1 kHz			420		nV/√Hz
OPEN-LOOP GAIN
A_OL	Open-loop voltage gain	(V–) + 0.3 V ≤ V_O ≤ (V+) – 0.3 V, R_L= 100 kΩ			120		dB
OUTPUT
V_OH	Voltage output swing from positive rail	V_S = 1.8V, R_L = 100 kΩ to V⁺/2		10	3.5		mV
V_OL	Voltage output swing from negative rail	V_S = 1.8V, R_L = 100 kΩ to V⁺/2			2.5	10	mV
I_SC	Short-circuit current	V_S = 3.3V, Short to V_S/2			4.7		mA
Z_O	Open loop output impedance	ƒ = 1 KHz, I_O = 0 A			90		kΩ
FREQUENCY RESPONSE
GBP	Gain-bandwidth product	C_L= 20 pF, R_L = 10 MΩ, V_S = 5V			8		kHz
SR	Slew rate (10% to 90%)	G = 1, Rising Edge, C_L= 20 pF, V_S = 5V			2		V/ms
SR	Slew rate (10% to 90%)	G = 1, Falling Edge, C_L= 20 pF, V_S = 5V			2.1		V/ms
POWER SUPPLY
I_Q-LPV801	Quiescent Current	V_CM = V-, I_O = 0, V_S = 3.3 V			450	540	nA
I_Q-LPV802	Quiescent Current, Per Channel	V_CM = V-, I_O = 0, V_S = 3.3 V			320	415	nA

6.6 Typical Characteristics

at T_A = 25°C, R_L = 10MΩ to V_S/2 ,C_L = 20pF, V_CM = V_S / 2V unless otherwise specified.

V_CM = V-

LPV801

R_L=No Load

Figure 1. Supply Current vs. Supply Voltage, LPV801

V_S= 1.8V

R_L= 10MΩ

Figure 3. Typical Offset Voltage vs. Common Mode Voltage

V_S= 5V

R_L= 10MΩ

Figure 5. Typical Offset Voltage vs. Common Mode Voltage

V_S= 1.8V

T_A = -40°C

Figure 7. Input Bias Current vs. Common Mode Voltage

V_S= 1.8V

T_A = 25°C

Figure 9. Input Bias Current vs. Common Mode Voltage

V_S= 1.8V

T_A = 125°C

Figure 11. Input Bias Current vs. Common Mode Voltage

V_S= 1.8V

R_L= No Load

Figure 13. Output Swing vs. Sourcing Current, 1.8V

V_S= 3.3V

R_L= No Load

Figure 15. Output Swing vs. Sourcing Current, 3.3V

V_S= 5V

R_L= No Load

Figure 17. Output Swing vs. Sourcing Current, 5V

T_A = 25	R_L= 10MΩ	Vout = 200mVpp
V_S= ±0.9V	C_L= 20pF	A_V= +1

Figure 19. Small Signal Pulse Response, 1.8V

T_A = 25	R_L= 10MΩ	Vout = 1Vpp
V_S= ±0.9V	C_L= 20pF	A_V= +1

Figure 21. Large Signal Pulse Response, 1.8V

T_A = 25	R_L= 10MΩ	ΔV_CM = 0.5Vpp
V_S= 5V	C_L= 20p
V_CM = Vs/2	A_V= +1

Figure 23. CMRR vs Frequency

T_A = -40, 25, 125°C	R_L= 10MΩ	V_OUT = 200mV_PP
V_S= 5V	C_L= 20pF	V_CM = Vs/2

Figure 25. Open Loop Gain and Phase, 5V, 10 MΩ Load

T_A = -40, 25, 125°C	R_L= 1MΩ	V_OUT = 200mV_PP
V_S= 5V	C_L= 20pF	V_CM = Vs/2

Figure 27. Open Loop Gain and Phase, 5V, 1 MΩ Load

T_A = -40, 25, 125°C	R_L= 100kΩ	V_OUT = 200mV_PP
V_S= 5V	C_L= 20pF	V_CM = Vs/2

Figure 29. Open Loop Gain and Phase, 5V, 100kΩ Load

T_A = -40, 25, 125°C	R_L= 10MΩ	V_OUT = 200mV_PP
V_S= 1.8V	C_L= 20pF	V_CM = Vs/2

Figure 31. Open Loop Gain and Phase, 1.8V, 10 MΩ Load

T_A = -40, 25, 125°C	R_L= 1MΩ	V_OUT = 200mV_PP
V_S= 1.8V	C_L= 20pF	V_CM = Vs/2

Figure 33. Open Loop Gain and Phase, 1.8V, 1 MΩ Load

T_A = -40, 25, 125°C	R_L= 100kΩ	V_OUT = 200mV_PP
V_S= 1.8V	C_L= 20pF	V_CM = Vs/2

Figure 35. Open Loop Gain and Phase, 1.8V, 100kΩ Load

V_CM = V-

LPV802

R_L=No Load

Figure 2. Supply Current vs. Supply Voltage, LPV802

V_S= 3.3V

R_L= 10MΩ

Figure 4. Typical Offset Voltage vs. Common Mode Voltage

V_S= 5V

T_A = -40 to 125

V_CM = Vs/2

Figure 6. Input Bias Current vs. Temperature

V_S= 5V

T_A = -40°C

Figure 8. Input Bias Current vs. Common Mode Voltage

V_S= 5V

T_A = 25°C

Figure 10. Input Bias Current vs. Common Mode Voltage

V_S= 5V

T_A = 125°C

Figure 12. Input Bias Current vs. Common Mode Voltage

V_S= 1.8V

R_L= No Load

Figure 14. Output Swing vs. Sinking Current, 1.8V

V_S= 3.3V

R_L= No Load

Figure 16. Output Swing vs. Sinking Current, 3.3V

V_S= 5V

R_L= No Load

Figure 18. Output Swing vs. Sinking Current, 5V

T_A = 25	R_L= 10MΩ	Vout = 200mVpp
V_S= ±2.5V	C_L= 20pF	A_V= +1

Figure 20. Small Signal Pulse Response, 5V

T_A = 25	R_L= 10MΩ	Vout = 2Vpp
V_S= ±2.5V	C_L= 20pF	A_V= +1

Figure 22. Large Signal Pulse Response, 5V

T_A = 25	R_L= 10MΩ	ΔV_S = 0.5Vpp
V_S= 3.3V	C_L= 20p
V_CM = Vs/2	A_V= +1

Figure 24. ±PSRR vs Frequency

T_A = -40, 25, 125°C	R_L= 10MΩ	V_OUT = 200mV_PP
V_S= 3.3V	C_L= 20pF	V_CM = Vs/2

Figure 26. Open Loop Gain and Phase, 3.3V, 10 MΩ Load

T_A = -40, 25, 125°C	R_L= 1MΩ	V_OUT = 200mV_PP
V_S= 3.3V	C_L= 20pF	V_CM = Vs/2

Figure 28. Open Loop Gain and Phase, 3.3V, 1 MΩ Load

T_A = -40, 25, 125°C	R_L= 100kΩ	V_OUT = 200mV_PP
V_S= 3.3V	C_L= 20pF	V_CM = Vs/2

Figure 30. Open Loop Gain and Phase, 3.3V, 100kΩ Load

T_A = 25°C

V_S= 5 V

R_L= 10MΩ

Figure 32. Open Loop Output Impedance

T_A = 25	R_L= 1MΩ	V_CM = Vs/2
V_S= 5V	C_L= 20pF	A_V= +1

Figure 34. Input Voltage Noise vs Frequency

T_A = 25	R_L= 1MΩ	V_CM = Vs/2
V_S= 3.3V	C_L= 20pF	A_V= +1

Figure 36. EMIRR Performance