SDLS972B April   2023  – April 2024 LSF0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  LSF0102 AC Performance (Translating Down) Switching Characteristics , VCCB = 3.3V
    7. 5.7  LSF0102 AC Performance (Translating Down) Switching Characteristics, VCCB = 2.5V
    8. 5.8  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 3.3V
    9. 5.9  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 2.5V
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto Bidirectional Voltage Translation
      2. 7.3.2 Output Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Up and Down Translation
        1. 7.4.1.1 Up Translation
        2. 7.4.1.2 Down Translation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Open-Drain Interface (I2C, PMBus, SMBus, and GPIO)
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 8.2.1.1.2 Bias Circuitry
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
          2. 8.2.1.2.2 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Mixed-Mode Voltage Translation
      3. 8.2.3 Single Supply Translation
      4. 8.2.4 Voltage Translation for Vref_B < Vref_A + 0.8V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
  12. 11Revision History

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • DDF|8
  • DTM|8
  • YZT|8
  • DCT|8
  • DQE|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2 Mixed-Mode Voltage Translation

The supply voltage (VPU) for each channel can be individually set with a pull-up resistor. Figure 8-4 shows an example of this mixed-mode multi-voltage translation. For additional details on multi-voltage translation, see the Multi-voltage Translation with the LSF Family video.

With the Vref_B pulled up to 5V and Vref_A connected to 1.8V, all channels will be clamped to 1.8V at which point a pullup can be used to define the high level voltage for a given channel.

  • Push-Pull Down Translation (5V to 1.8V): Channel 1 is an example of this setup. When B1 is 5V, A1 is clamped to 1.8V, and when B1 is LOW, A1 is driven LOW through the switch.
  • Push-Pull Up Translation (1.8V to 5V): Channel 2 is an example of this setup. When A2 is 1.8V, the switch is high impedance and the B2 channel is pulled up to 5V. When A2 is LOW, B2 is driven LOW through the switch.
  • Push-Pull Down Translation (3.3V to 1.8V): Channels 3 and 4 are examples of this setup. When either B3 or B4 are driven to 3.3V, A3 or A4 are clamped to 1.8V, and when either B3 or B4 are LOW, A3 or A4 are driven LOW through the switch.
  • Open-Drain Bidirectional Translation (3.3V ↔ 1.8V): Channels 5 through 8 are examples of this setup. These channels are for bidirectional operation for I2C and MDIO to translate between 1.8V and 3.3V with open-drain drivers.

GUID-20230419-SS0I-CZPH-203X-TPF1HSN7KW78-low.svgFigure 8-4 Multi-Voltage Translation with the LSF010x