SNVSA23B July   2014  – September 2023 LV284

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Bootstrap Voltage (CB)
      3. 7.3.3 Setting the Ouput Voltage
      4. 7.3.4 Enable (SHDN) and VIN Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
      2. 7.4.2 Eco-mode
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 5 V Output Application
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Design Guide – Step By Step Design Procedure
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Output Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Schottky Diode Selection
          4. 8.2.1.2.4 Input Capacitor Selection
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

Layout is a critical portion of good power supply design. The following guidelines help users design a PCB with the best power conversion performance, thermal performance, and minimized generation of unwanted EMI.

  1. The feedback network, resistors R1 and R2, must be kept close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin.
  2. The input capacitor CIN must be placed close to the VIN pin. This will reduce copper trace inductance which effects input voltage ripple of the IC.
  3. The output capacitor COUT must be placed close to the junction of L1 and the diode D1. The L1, D1 and COUT trace must be as short as possible to reduce conducted and radiated noise.
  4. The inductor L1 must be placed close to the SW pin to reduce magnetic and electrostatic noise.
  5. The ground connection for the diode, CIN and COUT must be tied to the system ground plane in only one spot (preferably at the COUT ground point) to minimize conducted noise in the system ground plane.
  6. For more detail on switching power supply layout considerations see Application Note AN-1149.