SNVSA23B July   2014  – September 2023 LV284

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency PWM Control
      2. 7.3.2 Bootstrap Voltage (CB)
      3. 7.3.3 Setting the Ouput Voltage
      4. 7.3.4 Enable (SHDN) and VIN Undervoltage Lockout
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
      2. 7.4.2 Eco-mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 5 V Output Application
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Design Guide – Step By Step Design Procedure
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Output Inductor Selection
          2. 8.2.1.2.2 Output Capacitor Selection
          3. 8.2.1.2.3 Schottky Diode Selection
          4. 8.2.1.2.4 Input Capacitor Selection
          5. 8.2.1.2.5 Bootstrap Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4 Enable (SHDN) and VIN Undervoltage Lockout

The LV284 SHDN pin is a high voltage tolerant input with an internal pull up circuit. The device can be enabled even if the SHDN pin is floating. The regulator can also be turned on using 1.25 V or higher logic signals. If the use of a higher voltage is desired due to system or other constraints it can be used. TI recommends a 100 kΩ or larger resistor between the applied voltage and the SHDN pin to protect the device. When SHDN is pulled down to 0 V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode the supply current decreases to approximately 1 µA. If the shutdown function is not to be used, the SHDN pin can be tied to VIN. The maximum voltage to the SHDN pin must not exceed 40 V.

The LV284 has an internal UVLO circuit to shutdown the output if the input voltage falls below an internally fixed UVLO threshold level. This circuit ensures that the regulator is not latched into an unknown state during low input voltage conditions. The regulator powers up when the input voltage exceeds the UVLO voltage level. If there is a requirement for a higher UVLO voltage, the SHDN can be used to adjust the input voltage UVLO by using external resistors.