SLLS723D April   2006  – February 2024 MAX232E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Electrical Characteristics: Driver
    7. 5.7  Electrical Characteristics: Receiver
    8. 5.8  Switching Characteristics: Driver
    9. 5.9  Switching Characteristics: Receiver
    10. 5.10 Typical Characteristics
  7.   17
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power
      2. 6.3.2 RS-232 Driver
      3. 6.3.3 RS-232 Receiver
    4. 6.4 Device Functional Modes
      1. 6.4.1 VCC Powered by 5V
      2. 6.4.2 VCC Unpowered
      3. 6.4.3 Truth Tables
  9. 7 Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The MAX232E is a dual driver and receiver that includes a capacitive voltage generator to supply RS-232-F compliant voltage levels from a single 5V supply. Each receiver converts RS-232 inputs to 5V TTL/CMOS levels. This receiver has a typical threshold of 1.3V, a typical hysteresis of 0.5V, and can accept ±30V inputs. Each driver converts TTL/CMOS input levels into TIA/RS-232-F levels.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
MAX232 SOIC (16) 9.9mm × 6mm
SOIC (16) 10.4mm × 10.3mm
PDIP (16) 19.3mm × 9mm
SOP (16) 10.2mm × 7.8 mm
(1) For more Information, see Section 10.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.



GUID-C5AC5107-C6AE-4E42-AB8D-636380956A41-low.gif Logic Diagram (Positive Logic)