SLLS348P June   1999  – July 2021 MAX3221

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics – Power
    6. 6.6  Electrical Characteristics – Driver
    7. 6.7  Electrical Characteristics – Receiver
    8. 6.8  Electrical Characteristics – Status
    9. 6.9  Switching Characteristics – Driver
    10. 6.10 Switching Characteristics – Receiver
    11. 6.11 Switching Characteristics – Status
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1.     20
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power
      2. 8.3.2 RS232 Driver
      3. 8.3.3 RS232 Receiver
      4. 8.3.4 RS232 Status
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Support Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.10 Switching Characteristics – Receiver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(3)
PARAMETERTEST CONDITIONSMINTYP(1)MAXUNIT
tPLHPropagation delay time, low- to high-level outputCL = 150 pF,
see Figure 7-3		150ns
tPHLPropagation delay time, high- to low-level outputCL = 150 pF,
see Figure 7-3		150ns
tenOutput enable timeCL = 150 pF, RL = 3 kΩ,
see Figure 7-4		200ns
tdisOutput disable timeCL = 150 pF, RL = 3 kΩ,
see Figure 7-4		200ns
tsk(p)Pulse skew(2)See Figure 7-350ns
(1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(2) Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
(3) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.