SLLS664E August   2005  – June 2021 MAX3232E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions (1)
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics — Device (1)
    7. 6.7  Electrical Characteristics — Driver (1)
    8. 6.8  Electrical Characteristics — Receiver (1)
    9. 6.9  Switching Characteristics (1)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power
      2. 8.3.2 RS232 Driver
      3. 8.3.3 RS232 Receiver
    4. 8.4 Device Functional Modes
      1. 8.4.1 VCC Powered by 3 V to 5.5 V
      2. 8.4.2 VCC Unpowered, VCC = 0 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.9 Switching Characteristics(1)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT
Maximum data rate RL = 3 kΩ,
One DOUT switching,		 CL = 1000 pF,
see Figure 7-1		 150 250 kbit/s
tsk(p) Driver pulse skew(3) RL = 3 kΩ to 7 kΩ,
see Figure 7-2		 CL = 150 pF to 2500 pF, 300 ns
SR(tr) Driver slew rate, transition region
(see Figure 7-1)
RL = 3 kΩ to 7 kΩ,
VCC = 3.3 V		 CL = 150 pF to 1000 pF 6 30 V/μs
CL = 150 pF to 2500 pF 4 30
tPLH Receiver propagation delay time, low- to high-level output CL = 150 pF,
see Figure 7-3		 300 ns
tPHL Receiver propagation delay time, high- to low-level output 300 ns
tsk(p) Receiver pulse skew(3) 300 ns
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.