SLLSFP7A december   2022  – april 2023 MCT8315A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Stage
      2. 7.3.2  Device Interface
        1. 7.3.2.1 Interface - Control and Monitoring
        2. 7.3.2.2 I2C Interface
      3. 7.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 7.3.3.1 Buck in Inductor Mode
        2. 7.3.3.2 Buck in Resistor mode
        3. 7.3.3.3 Buck Regulator with External LDO
        4. 7.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 7.3.3.5 Mixed Mode Buck Operation and Control
        6. 7.3.3.6 Buck Under Voltage Protection
        7. 7.3.3.7 Buck Over Current Protection
      4. 7.3.4  AVDD Linear Voltage Regulator
      5. 7.3.5  Charge Pump
      6. 7.3.6  Slew Rate Control
      7. 7.3.7  Cross Conduction (Dead Time)
      8. 7.3.8  Speed Control
        1. 7.3.8.1 Analog Mode Speed Control
        2. 7.3.8.2 PWM Mode Speed Control
        3. 7.3.8.3 I2C based Speed Control
        4. 7.3.8.4 Frequency Mode Speed Control
      9. 7.3.9  Starting the Motor Under Different Initial Conditions
        1. 7.3.9.1 Case 1 – Motor is Stationary
        2. 7.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 7.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 7.3.10 Motor Start Sequence (MSS)
        1. 7.3.10.1 Initial Speed Detect (ISD)
        2. 7.3.10.2 Motor Resynchronization
        3. 7.3.10.3 Reverse Drive
        4. 7.3.10.4 Motor Start-up
          1. 7.3.10.4.1 Align
          2. 7.3.10.4.2 Double Align
          3. 7.3.10.4.3 Initial Position Detection (IPD)
            1. 7.3.10.4.3.1 IPD Operation
            2. 7.3.10.4.3.2 IPD Release Mode
            3. 7.3.10.4.3.3 IPD Advance Angle
          4. 7.3.10.4.4 Slow First Cycle Startup
          5. 7.3.10.4.5 Open loop
          6. 7.3.10.4.6 Transition from Open to Closed Loop
      11. 7.3.11 Closed Loop Operation
        1. 7.3.11.1 120o Commutation
          1. 7.3.11.1.1 High-Side Modulation
          2. 7.3.11.1.2 Low-Side Modulation
          3. 7.3.11.1.3 Mixed Modulation
        2. 7.3.11.2 Variable Commutation
        3. 7.3.11.3 Lead Angle Control
        4. 7.3.11.4 Closed loop accelerate
      12. 7.3.12 Speed Loop
      13. 7.3.13 Input Power Regulation
      14. 7.3.14 Anti-Voltage Surge (AVS)
      15. 7.3.15 Output PWM Switching Frequency
      16. 7.3.16 Fast Start-up (< 50 ms)
        1. 7.3.16.1 BEMF Threshold
        2. 7.3.16.2 Dynamic Degauss
      17. 7.3.17 Fast Deceleration
      18. 7.3.18 Active Demagnetization
        1. 7.3.18.1 Active Demagnetization in action
      19. 7.3.19 Motor Stop Options
        1. 7.3.19.1 Coast (Hi-Z) Mode
        2. 7.3.19.2 Recirculation Mode
        3. 7.3.19.3 Low-Side Braking
        4. 7.3.19.4 High-Side Braking
        5. 7.3.19.5 Active Spin-Down
      20. 7.3.20 FG Configuration
        1. 7.3.20.1 FG Output Frequency
        2. 7.3.20.2 FG Open-Loop and Lock Behavior
      21. 7.3.21 Protections
        1. 7.3.21.1  VM Supply Undervoltage Lockout
        2. 7.3.21.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 7.3.21.3  BUCK Undervoltage Lockout (BUCK_UV)
        4. 7.3.21.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 7.3.21.5  Overvoltage Protection (OVP)
        6. 7.3.21.6  Overcurrent Protection (OCP)
          1. 7.3.21.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 7.3.21.6.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 7.3.21.6.3 OCP Report Only (OCP_MODE = 10b)
          4. 7.3.21.6.4 OCP Disabled (OCP_MODE = 11b)
        7. 7.3.21.7  Buck Overcurrent Protection
        8. 7.3.21.8  Cycle-by-Cycle (CBC) Current Limit (CBC_ILIMIT)
          1. 7.3.21.8.1 CBC_ILIMIT Automatic Recovery next PWM Cycle (CBC_ILIMIT_MODE = 000xb)
          2. 7.3.21.8.2 CBC_ILIMIT Automatic Recovery Threshold Based (CBC_ILIMIT_MODE = 001xb)
          3. 7.3.21.8.3 CBC_ILIMIT Automatic Recovery after 'n' PWM Cycles (CBC_ILIMIT_MODE = 010xb)
          4. 7.3.21.8.4 CBC_ILIMIT Report Only (CBC_ILIMIT_MODE = 0110b)
          5. 7.3.21.8.5 CBC_ILIMIT Disabled (CBC_ILIMIT_MODE = 0111b or 1xxxb)
        9. 7.3.21.9  Lock Detection Current Limit (LOCK_ILIMIT)
          1. 7.3.21.9.1 LOCK_ILIMIT Latched Shutdown (LOCK_ILIMIT_MODE = 00xxb)
          2. 7.3.21.9.2 LOCK_ILIMIT Automatic Recovery (LOCK_ILIMIT_MODE = 01xxb)
          3. 7.3.21.9.3 LOCK_ILIMIT Report Only (LOCK_ILIMIT_MODE = 1000b)
          4. 7.3.21.9.4 LOCK_ILIMIT Disabled (LOCK_ILIMIT_MODE = 1xx1b)
        10. 7.3.21.10 Thermal Warning (OTW)
        11. 7.3.21.11 Thermal Shutdown (TSD)
        12. 7.3.21.12 Motor Lock (MTR_LCK)
          1. 7.3.21.12.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 7.3.21.12.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 7.3.21.12.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 7.3.21.12.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        13. 7.3.21.13 Motor Lock Detection
          1. 7.3.21.13.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 7.3.21.13.2 Lock 2: Loss of Sync (LOSS_OF_SYNC)
          3. 7.3.21.13.3 Lock3: No-Motor Fault (NO_MTR)
        14. 7.3.21.14 SW VM Undervoltage Protection
        15. 7.3.21.15 SW VM Overvoltage Protection
        16. 7.3.21.16 IPD Faults
    4. 7.4 Device Functional Modes
      1. 7.4.1 Functional Modes
        1. 7.4.1.1 Sleep Mode
        2. 7.4.1.2 Standby Mode
        3. 7.4.1.3 Fault Reset (CLR_FLT)
    5. 7.5 External Interface
      1. 7.5.1 DRVOFF Functionality
      2. 7.5.2 DAC outputs
      3. 7.5.3 Current Sense Output
      4. 7.5.4 Oscillator Source
        1. 7.5.4.1 External Clock Source
      5. 7.5.5 External Watchdog
    6. 7.6 EEPROM access and I2C interface
      1. 7.6.1 EEPROM Access
        1. 7.6.1.1 EEPROM Write
        2. 7.6.1.2 EEPROM Read
      2. 7.6.2 I2C Serial Interface
        1. 7.6.2.1 I2C Data Word
        2. 7.6.2.2 I2C Write Transaction
        3. 7.6.2.3 I2C Read Transaction
        4. 7.6.2.4 I2C Communication Protocol Packet Examples
        5. 7.6.2.5 I2C Clock Stretching
        6. 7.6.2.6 CRC Byte Calculation
    7. 7.7 EEPROM (Non-Volatile) Register Map
      1. 7.7.1 Algorithm_Configuration Registers
      2. 7.7.2 Fault_Configuration Registers
      3. 7.7.3 Hardware_Configuration Registers
      4. 7.7.4 Gate_Driver_Configuration Registers
    8. 7.8 RAM (Volatile) Register Map
      1. 7.8.1 Fault_Status Registers
      2. 7.8.2 System_Status Registers
      3. 7.8.3 Algo_Control Registers
      4. 7.8.4 Device_Control Registers
      5. 7.8.5 Algorithm_Variables Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Application curves
        1. 8.2.1.1 Motor startup
        2. 8.2.1.2 120o and variable commutation
        3. 8.2.1.3 Faster startup time
        4. 8.2.1.4 Setting the BEMF threshold
        5. 8.2.1.5 Maximum speed
        6. 8.2.1.6 Faster deceleration
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Support Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.8.1 Fault_Status Registers

Table 7-38 lists the memory-mapped registers for the Fault_Status registers. All register offset addresses not listed in Table 7-38 should be considered as reserved locations and the register contents should not be modified.

Table 7-38 FAULT_STATUS Registers
OffsetAcronymRegister NameSection
E0hGATE_DRIVER_FAULT_STATUSFault Status RegisterGATE_DRIVER_FAULT_STATUS Register (Offset = E0h) [Reset = 00000000h]
E2hCONTROLLER_FAULT_STATUSFault Status RegisterCONTROLLER_FAULT_STATUS Register (Offset = E2h) [Reset = 00000000h]

Complex bit access types are encoded to fit into small table cells. Table 7-39 shows the codes that are used for access types in this section.

Table 7-39 Fault_Status Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Reset or Default Value
-nValue after reset or the default value

7.8.1.1 GATE_DRIVER_FAULT_STATUS Register (Offset = E0h) [Reset = 00000000h]

GATE_DRIVER_FAULT_STATUS is shown in Figure 7-76 and described in Table 7-40.

Return to the Summary Table.

Status of various faults

Figure 7-76 GATE_DRIVER_FAULT_STATUS Register
3130292827262524
DRIVER_FAULTBK_FLTRESERVEDOCPNPOROVPOTRESERVED
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
2322212019181716
OTWTSDOCP_HCOCP_LCOCP_HBOCP_LBOCP_HAOCP_LA
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
15141312111098
RESERVEDOTP_ERRBUCK_OCPBUCK_UVVCP_UVRESERVED
R-0hR-0hR-0hR-0hR-0hR-0h
76543210
RESERVED
R-0h
Table 7-40 GATE_DRIVER_FAULT_STATUS Register Field Descriptions
BitFieldTypeResetDescription
31DRIVER_FAULTR0h Logic OR of driver fault registers
0h = No Gate Driver fault condition is detected
1h = Gate Driver fault condition is detected
30BK_FLTR0h Buck fault
0h = No buck regulator fault condition is detected
1h = Buck regulator fault condition is detected
29RESERVEDR0h Reserved
28OCPR0h Overcurrent protection status
0h = No overcurrent condition is detected
1h = Overcurrent condition is detected
27NPORR0h Supply power on reset
0h = Power on reset condition is detected on VM
1h = No power-on-reset condition is detected on VM
26OVPR0h Supply overvoltage protection status
0h = No overvoltage condition is detected on VM
1h = Overvoltage condition is detected on VM
25OTR0h Overtemperature fault status
0h = No overtemperature warning / shutdown is detected
1h = Overtemperature warning / shutdown is detected
24RESERVEDR0h Reserved
23OTWR0h Overtemperature warning status
0h = No overtemperature warning is detected
1h = Overtemperature warning is detected
22TSDR0h Overtemperature shutdown status
0h = No overtemperature shutdown is detected
1h = Overtemperature shutdown is detected
21OCP_HCR0h Overcurrent status on high-side switch of OUTC
0h = No overcurrent detected on high-side switch of OUTC
1h = Overcurrent detected on high-side switch of OUTC
20OCP_LCR0h Overcurrent status on low-side switch of OUTC
0h = No overcurrent detected on low-side switch of OUTC
1h = Overcurrent detected on low-side switch of OUTC
19OCP_HBR0h Overcurrent status on high-side switch of OUTB
0h = No overcurrent detected on high-side switch of OUTB
1h = Overcurrent detected on high-side switch of OUTB
18OCP_LBR0h Overcurrent status on low-side switch of OUTB
0h = No overcurrent detected on low-side switch of OUTB
1h = Overcurrent detected on low-side switch of OUTB
17OCP_HAR0h Overcurrent status on high-side switch of OUTA
0h = No overcurrent detected on high-side switch of OUTA
1h = Overcurrent detected on high-side switch of OUTA
16OCP_LAR0h Overcurrent status on low-side switch of OUTA
0h = No overcurrent detected on low-side switch of OUTA
1h = Overcurrent detected on low-side switch of OUTA
15RESERVEDR0h Reserved
14OTP_ERRR0h One-time programmable (OTP) error
0h = No OTP error is detected
1h = OTP Error is detected
13BUCK_OCPR0h Buck regulator overcurrent status
0h = No buck regulator overcurrent is detected
1h = Buck regulator overcurrent is detected
12BUCK_UVR0h Buck regulator undervoltage status
0h = No buck regulator undervoltage is detected
1h = Buck regulator undervoltage is detected
11VCP_UVR0h Charge pump undervoltage status
0h = No charge pump undervoltage is detected
1h = Charge pump undervoltage is detected
10-0RESERVEDR0h Reserved

7.8.1.2 CONTROLLER_FAULT_STATUS Register (Offset = E2h) [Reset = 00000000h]

CONTROLLER_FAULT_STATUS is shown in Figure 7-77 and described in Table 7-41.

Return to the Summary Table.

Status of various faults

Figure 7-77 CONTROLLER_FAULT_STATUS Register
3130292827262524
CONTROLLER_FAULTRESERVEDIPD_FREQ_FAULTIPD_T1_FAULTIPD_T2_FAULTRESERVED
R-0hR-0hR-0hR-0hR-0hR-0h
2322212019181716
ABN_SPEEDLOSS_OF_SYNCNO_MTRMTR_LCKCBC_ILIMITLOCK_ILIMITMTR_UNDER_VOLTAGEMTR_OVER_VOLTAGE
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
15141312111098
EXT_WD_TIMEOUTRESERVED
R-0hR-0h
76543210
RESERVEDSTL_ENSTL_STATUSAPP_RESET
R-0hR-0hR-0hR-0h
Table 7-41 CONTROLLER_FAULT_STATUS Register Field Descriptions
BitFieldTypeResetDescription
31CONTROLLER_FAULTR0h Logic OR of controller fault registers
0h = No controller fault condition is detected
1h = Controller fault condition is detected
30RESERVEDR0h Reserved
29IPD_FREQ_FAULTR0h Indicates IPD frequency fault
0h = No IPD frequency fault detected
1h = IPD frequency fault detected
28IPD_T1_FAULTR0h Indicates IPD T1 fault
0h = No IPD T1 fault detected
1h = IPD T1 fault detected
27IPD_T2_FAULTR0h Indicates IPD T2 fault
0h = No IPD T2 fault detected
1h = IPD T2 fault detected
26-24RESERVEDR0h Reserved
23ABN_SPEEDR0h Indicates abnormal speed motor lock condition
0h = No abnormal speed fault detected
1h = Abnormal Speed fault detected
22LOSS_OF_SYNCR0h Indicates sync lost motor lock condition
0h = No sync lost fault detected
1h = Sync lost fault detected
21NO_MTRR0h Indicates no motor fault
0h = No motor fault not detected
1h = No motor fault detected
20MTR_LCKR0h Indicates when one of the motor lock is triggered
0h = Motor lock fault not detected
1h = Motor lock fault detected
19CBC_ILIMITR0h Indicates CBC current limit fault
0h = No CBC fault detected
1h = CBC fault detected
18LOCK_ILIMITR0h Indicates lock detection current limit fault
0h = No lock current limit fault detected
1h = Lock current limit fault detected
17MTR_UNDER_VOLTAGER0h Indicates motor undervoltage fault
0h = No motor undervoltage detected
1h = Motor undervoltage detected
16MTR_OVER_VOLTAGER0h Indicates motor overvoltage fault
0h = No motor overvoltage detected
1h = Motor overvoltage detected
15EXT_WD_TIMEOUTR0h Indicates external watchdog timeout fault
0h = No external watchdog timeout fault detected
1h = External watchdog timeout fault detected
14-3RESERVEDR0h Reserved
2STL_ENR0h Indicates STL is enabled in EEPROM
0h = STL Disable
1h = STL Enable
1STL_STATUSR0h Indicates STL success criteria Pass = 1b; Fail = 0b
0h = STL Fail
1h = STL Pass
0APP_RESETR0h App reset
0h = App Reset Fail
1h = App Reset Successful