SLVSH53
December 2023
MCT8315Z
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
SPI Timing Requirements
7.7
SPI Secondary Device Mode Timings
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Output Stage
8.3.2
PWM Control Mode (1x PWM Mode)
8.3.2.1
Analog Hall Input Configuration
8.3.2.2
Digital Hall Input Configuration
8.3.2.3
Asynchronous Modulation
8.3.2.4
Synchronous Modulation
8.3.2.5
Motor Operation
8.3.3
Device Interface Modes
8.3.3.1
Serial Peripheral Interface (SPI)
8.3.3.2
Hardware Interface
8.3.4
Step-Down Mixed-Mode Buck Regulator
8.3.4.1
Buck in Inductor Mode
8.3.4.2
Buck in Resistor mode
8.3.4.3
Buck Regulator with External LDO
8.3.4.4
AVDD Power Sequencing on Buck Regulator
8.3.4.5
Mixed mode Buck Operation and Control
8.3.5
AVDD Linear Voltage Regulator
8.3.6
Charge Pump
8.3.7
Slew Rate Control
8.3.8
Cross Conduction (Dead Time)
8.3.9
Propagation Delay
8.3.9.1
Driver Delay Compensation
8.3.10
Pin Diagrams
8.3.10.1
Logic Level Input Pin (Internal Pulldown)
8.3.10.2
Logic Level Input Pin (Internal Pullup)
8.3.10.3
Open Drain Pin
8.3.10.4
Push Pull Pin
8.3.10.5
Four Level Input Pin
8.3.10.6
Seven Level Input Pin
8.3.11
Active Demagnetization
8.3.11.1
Automatic Synchronous Rectification Mode (ASR Mode)
8.3.11.1.1
Automatic Synchronous Rectification in Commutation
8.3.11.1.2
Automatic Synchronous Rectification in PWM Mode
8.3.11.2
Automatic Asynchronous Rectification Mode (AAR Mode)
8.3.12
Cycle-by-Cycle Current Limit
8.3.12.1
Cycle by Cycle Current Limit with 100% Duty Cycle Input
8.3.13
Hall Comparators (Analog Hall Inputs)
8.3.14
Advance Angle
8.3.15
FGOUT Signal
8.3.16
Protections
8.3.16.1
VM Supply Undervoltage Lockout (NPOR)
8.3.16.2
AVDD Undervoltage Lockout (AVDD_UV)
8.3.16.3
Buck Undervoltage Lockout (BUCK_UV)
8.3.16.4
VCP Charge Pump Undervoltage Lockout (CPUV)
8.3.16.5
Overvoltage Protection (OVP)
8.3.16.6
Overcurrent Protection (OCP)
8.3.16.6.1
OCP Latched Shutdown (OCP_MODE = 00b)
8.3.16.6.2
OCP Automatic Retry (OCP_MODE = 01b)
8.3.16.7
Buck Overcurrent Protection
8.3.16.8
Motor Lock (MTR_LOCK)
8.3.16.8.1
MTR_LOCK Latched Shutdown (MTR_LOCK_MODE = 00b)
8.3.16.8.2
MTR_LOCK Automatic Retry (MTR_LOCK_MODE = 01b)
8.3.16.8.3
MTR_LOCK Report Only (MTR_LOCK_MODE= 10b)
8.3.16.8.4
MTR_LOCK Disabled (MTR_LOCK_MODE = 11b)
8.3.16.8.5
75
8.3.16.9
Thermal Warning (OTW)
8.3.16.10
Thermal Shutdown (OTSD)
8.3.16.10.1
OTSD FET
8.3.16.10.2
OTSD (Non-FET)
8.4
Device Functional Modes
8.4.1
Functional Modes
8.4.1.1
Sleep Mode
8.4.1.2
Operating Mode
8.4.1.3
Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
8.4.2
DRVOFF
8.5
SPI Communication
8.5.1
Programming
8.5.1.1
SPI Format
8.6
Register Map
8.6.1
STATUS Registers
8.6.2
CONTROL Registers
9
Application and Implementation
9.1
Application Information
9.2
Hall Sensor Configuration and Connection
9.2.1
Typical Configuration
9.2.2
Open Drain Configuration
9.2.3
Series Configuration
9.2.4
Parallel Configuration
9.3
Typical Applications
9.3.1
Three-Phase Brushless-DC Motor Control With Current Limit
9.3.1.1
Detailed Design Procedure
9.3.1.1.1
Motor Voltage
9.3.1.1.2
Using Active Demagnetization
9.3.1.1.3
Using Delay Compensation
9.3.1.1.4
Using the Buck Regulator
9.3.1.1.5
Power Dissipation and Junction Temperature Losses
9.3.1.2
Application Curves
10
Power Supply Recommendations
10.1
Bulk Capacitance
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.3
Thermal Considerations
11.3.1
Power Dissipation
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RRY|32
MPQF713A
Thermal pad, mechanical data (Package|Pins)
RRY|32
QFND764
Orderable Information
slvsh53_oa
11
Layout