SLLSFQ3 January 2023 MCT8329A
PRODUCTION DATA
#GUID-20220906-SS0T-3JP9-NBH6-G7XRBG0B8MTQ/ALGO_CONTROL_ALGO_CONTROL_TABLE_1_TABLE lists the memory-mapped registers for the Algo_Control registers. All register offset addresses not listed in #GUID-20220906-SS0T-3JP9-NBH6-G7XRBG0B8MTQ/ALGO_CONTROL_ALGO_CONTROL_TABLE_1_TABLE should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
E6h | ALGO_CTRL1 | Algorithm Control Parameters | ALGO_CTRL1 Register (Offset = E6h) [Reset = 00000000h] |
Complex bit access types are encoded to fit into small table cells. #GUID-20220906-SS0T-3JP9-NBH6-G7XRBG0B8MTQ/ALGO_CONTROL_ALGO_CONTROL_LEGEND_TABLE shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
ALGO_CTRL1 is shown in #GUID-20220906-SS0T-3JP9-NBH6-G7XRBG0B8MTQ/ALGO_CONTROL_ALGO_CONTROL_ALGO_CONTROL_ALGO_CTRL1_TABLE_TABLE.
Return to the Summary Table.
Algorithm Control Parameters
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | EEPROM_WRT | W | 0h | Write the configuration to EEPROM
1h = Write to the EEPROM registers from shadow registers |
30 | EEPROM_READ | W | 0h | Read the default configuration from EEPROM
1h = Read the EEPROM registers to shadow registers |
29 | CLR_FLT | W | 0h | Clears all faults
1h = Clear all the driver and controller faults |
28 | CLR_FLT_RETRY_COUNT | W | 0h | Clears fault retry count
1h = clear the lock fault retry counts |
27-20 | EEPROM_WRITE_ACCESS_KEY | W | 0h | EEPROM write access key; 8-bit key to unlock the EEPROM write command |
19-1 | RESERVED | W | 0h | Reserved |
0 | EXT_WD_STATUS_SET | W | 0h | Watchdog status to be set by external MCU in I2C watchdog mode
0h = Reset automatically by the MCC 1h = To set the EXT_WD_STATUS_SET |