SLLSFQ3 Data sheet

SLLSFQ3 January 2023 MCT8329A

PRODUCTION DATA

#GUID-20220906-SS0T-KQZV-9Z5J-BCDGKT3GP9TZ/HARDWARE_CONFIGURATION_HARDWARE_CONFIGURATION_TABLE_1_TABLE lists the memory-mapped registers for the Hardware_Configuration registers. All register offset addresses not listed in #GUID-20220906-SS0T-KQZV-9Z5J-BCDGKT3GP9TZ/HARDWARE_CONFIGURATION_HARDWARE_CONFIGURATION_TABLE_1_TABLE should be considered as reserved locations and the register contents should not be modified.

Table 7-33 HARDWARE_CONFIGURATION Registers

Offset	Acronym	Register Name	Section
A6h	PIN_CONFIG1	Hardware pin configuration	PIN_CONFIG1 Register (Offset = A6h) [Reset = 00000000h]
A8h	PIN_CONFIG2	Hardware pin configuration	PIN_CONFIG2 Register (Offset = A8h) [Reset = 06000000h]
AAh	DEVICE_CONFIG	Peripheral configuration	DEVICE_CONFIG Register (Offset = AAh) [Reset = 00002000h]

Complex bit access types are encoded to fit into small table cells. #GUID-20220906-SS0T-KQZV-9Z5J-BCDGKT3GP9TZ/HARDWARE_CONFIGURATION_HARDWARE_CONFIGURATION_LEGEND_TABLE shows the codes that are used for access types in this section.

Table 7-34 Hardware_Configuration Access Type Codes

Access Type	Code	Description
Read Type
R	R	Read
Write Type
W	W	Write
Reset or Default Value
-n		Value after reset or the default value

7.7.3.1 PIN_CONFIG1 Register (Offset = A6h) [Reset = 00000000h]

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Table 7-35 PIN_CONFIG1 Register Field Descriptions

Bit	Field	Type	Reset	Description
31	PARITY	R/W	0h	Parity bit
30-19	DACOUT_VAR_ADDR	R/W	0h	12-bit address of variable to be monitored.
18-7	RESERVED	R/W	0h	RSVD
6-5	BRAKE_INPUT	R/W	0h	Brake input configuration 0h = Hardware pin based BRAKE 1h = BRAKE always ON 2h = BRAKE always OFF 3h = N/A
4-3	DIR_INPUT	R/W	0h	Direction input configuration 0h = Hardware Pin DIR 1h = Overwrite Hardware pin with clockwise rotation OUTA-OUTB-OUTC 2h = Overwrite Hardware pin with counter clockwise rotation OUTA-OUTC-OUTB 3h = N/A
2-1	SPD_CTRL_MODE	R/W	0h	Speed input configuration 0h = Analog mode speed Input 1h = PWM Mode Speed Input 2h = I2C Speed Input mode 3h = Frequency based speed Input mode
0	RESERVED	R/W	0h	Reserved

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Table 7-36 PIN_CONFIG2 Register Field Descriptions

Bit	Field	Type	Reset	Description
31	PARITY	R/W	0h	Parity bit
30-29	DAC_SOX_ANA_CONFIG	R/W	0h	DAC_SOX_ANA_SPEED configuration 0h = DACOUT 1h = CSA_OUT 2h = ANA_ON_PIN 3h = N/A
28-27	SLEEP_TIME	R/W	0h	Sleep Time 0h = Check low for 50 µs 1h = Check low for 200 µs 2h = Check low for 20 ms 3h = Check low for 200 ms
26-20	I2C_TARGET_ADDR	R/W	60h	I2C target address
19-14	RESERVED	R/W	0h	Reserved
13	FG_CONFIG	R/W	0h	Fault on FG Pin Configuration 0h = FG Pin ative till speed drops below BEMF threshold defined by FG_BEMF_THR 1h = FG Pin toggle as long as motor is actively driven
12-11	FG_PIN_FAULT_CONFIG	R/W	0h	FG pin status on actionable and reported faults 0h = FG Pin continues to toggle till motor stops 1h = FG Pin in Hi-Z state, pulled up externally 2h = FG Pin pulled Low 3h = N/A
10-9	FG_PIN_STOP_CONFIG	R/W	0h	FG pin status when motor is stopped 0h = FG Pin continues to toggle till motor stops 1h = FG Pin in Hi-Z state, pulled up externally 2h = FG Pin pulled Low 3h = N/A
8-5	TBLANK	R/W	0h	BEMF Comparator Blanking time after PWM edge for ZC detection 0h = 0 µs 1h = 1 µs 2h = 2 µs 3h = 3 µs 4h = 4 µs 5h = 5 µs 6h = 6 µs 7h = 7 µs 8h = 8 µs 9h = 9 µs Ah = 10 µs Bh = 11 µs Ch = 12 µs Dh = 13 µs Eh = 14 µs Fh = 15 µs
4-2	TPWDTH	R/W	0h	BEMF Comparator deglitch time 0h = 0 µs 1h = 1 µs 2h = 2 µs 3h = 3 µs 4h = 4 µs 5h = 5 µs 6h = 6 µs 7h = 7 µs
1-0	ZERO_DUTY_HYST	R/W	0h	Duty cycle hysteresis to exit standby 0h = 0 % 1h = 2 % 2h = 4 % 3h = 6 %

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Table 7-37 DEVICE_CONFIG Register Field Descriptions

Bit	Field	Type	Reset	Description
31	PARITY	R/W	0h	Parity bit
30-16	INPUT_MAX_FREQUENCY	R/W	0h	Maximum frequency (in Hz) for frequency based speed input corresponding to 100% duty command. Hence, DUTY_CMD (%) = (Applied Frequency / INPUT_MAX_FREQUENCY) * 100.
15	STL_ENABLE	R/W	0h	STL enable 0h = Disable 1h = Enable
14	SSM_CONFIG	R/W	0h	SSM enable 0h = Enable 1h = Disable
13-12	RESERVED	R/W	2h	Reserved
11	DEV_MODE	R/W	0h	Device mode select 0h = Standby mode 1h = Sleep mode
10	SPD_PWM_RANGE_SELECT	R/W	0h	Speed Input PWM frequency range select 0h = 325 Hz to 95 kHz speed PWM input 1h = 10 Hz to 325 Hz speed PWM input
9-8	CLK_SEL	R/W	0h	Clock source 0h = Internal Oscillator 1h = N/A 2h = N/A 3h = External Clock input
7	EXT_CLK_EN	R/W	0h	External clock enable 0h = Disable 1h = Enable
6-4	EXT_CLK_CONFIG	R/W	0h	External clock frequency 0h = 8 kHz 1h = 16 kHz 2h = 32 kHz 3h = 64 kHz 4h = 128 kHz 5h = 256 kHz 6h = 512 kHz 7h = 1024 kHz
3-0	DIG_DEAD_TIME	R/W	0h	Digital Dead Time 0h = 0 1h = 50nS 2h = 100nS 3h = 150nS 4h = 200nS 5h = 250nS 6h = 300nS 7h = 350nS 8h = 400nS 9h = 450nS Ah = 500nS Bh = 600nS Ch = 700nS Dh = 800nS Eh = 900nS Fh = 1000nS