SLAS678G August 2010 – September 2020 MSP430F5324 , MSP430F5325 , MSP430F5326 , MSP430F5327 , MSP430F5328 , MSP430F5329
PRODUCTION DATA
TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compares. TB0 can support multiple capture/compares, PWM outputs, and interval timing (see Table 9-13). TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compares.
INPUT PIN NUMBER | DEVICE INPUT SIGNAL | MODULE INPUT SIGNAL | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL | OUTPUT PIN NUMBER | ||
---|---|---|---|---|---|---|---|---|
RGC, ZXH, ZQE(1) | PN | RGC, ZXH, ZQE(1) | PN | |||||
60-P7.7 | TB0CLK | TBCLK | Timer | NA | NA | |||
ACLK (internal) | ACLK | |||||||
SMCLK (internal) | SMCLK | |||||||
60-P7.7 | TB0CLK | TBCLK | ||||||
55-P5.6 | TB0.0 | CCI0A | CCR0 | TB0 | TB0.0 | 55-P5.6 | ||
55-P5.6 | TB0.0 | CCI0B | ADC12 (internal) ADC12SHSx = {2} |
ADC12 (internal) ADC12SHSx = {2} |
||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
56-P5.7 | TB0.1 | CCI1A | CCR1 | TB1 | TB0.1 | 56-P5.7 | ||
CBOUT (internal) | CCI1B | ADC12 (internal) ADC12SHSx = {3} |
ADC12 (internal) ADC12SHSx = {3} |
|||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
57-P7.4 | TB0.2 | CCI2A | CCR2 | TB2 | TB0.2 | 57-P7.4 | ||
57-P7.4 | TB0.2 | CCI2B | ||||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
58-P7.5 | TB0.3 | CCI3A | CCR3 | TB3 | TB0.3 | 58-P7.5 | ||
58-P7.5 | TB0.3 | CCI3B | ||||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
59-P7.6 | TB0.4 | CCI4A | CCR4 | TB4 | TB0.4 | 59-P7.6 | ||
59-P7.6 | TB0.4 | CCI4B | ||||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
42-P3.5 | TB0.5 | CCI5A | CCR5 | TB5 | TB0.5 | 42-P3.5 | ||
42-P3.5 | TB0.5 | CCI5B | ||||||
DVSS | GND | |||||||
DVCC | VCC | |||||||
43-P3.6 | TB0.6 | CCI6A | CCR6 | TB6 | TB0.6 | 43-P3.6 | ||
ACLK (internal) | CCI6B | |||||||
DVSS | GND | |||||||
DVCC | VCC |