SLAS678G August 2010 – September 2020 MSP430F5324 , MSP430F5325 , MSP430F5326 , MSP430F5327 , MSP430F5328 , MSP430F5329
PRODUCTION DATA
The following documents describe the MSP430F532x MCUs. Copies of these documents are available on the Internet at www.ti.com.
Receiving Notification of Document Updates
To receive notification of documentation updates—including silicon errata—go to the product folder for your device on ti.com (for links to the product folders, see Table 10-2). In the upper right corner, click the "Alert me" button. This registers you to receive a weekly digest of product information that has changed (if any). For change details, check the revision history of any revised document.
Errata
MSP430F5329 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
MSP430F5328 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
MSP430F5327 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
MSP430F5326 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
MSP430F5325 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
MSP430F5324 Device Erratasheet
Describes the known exceptions to the functional specifications for all silicon revisions of the device.
User's Guides
MSP430F5xx and MSP430F6xx Family User's Guide
Detailed information on the modules and peripherals available in this device family.
MSP430 Flash Device Bootloader (BSL) User's Guide
The MSP430 bootloader (BSL) lets users communicate with embedded memory in the MSP430 microcontroller during the prototyping phase, final production, and in service. Both the programmable memory (flash memory) and the data memory (RAM) can be modified as required. Do not confuse the bootloader with the bootstrap loader programs found in some digital signal processors (DSPs) that automatically load program code (and data) from external memory to the internal memory of the DSP.
MSP430 Programming With the JTAG Interface
This document describes the functions that are required to erase, program, and verify the memory module of the MSP430 flash-based and FRAM-based microcontroller families using the JTAG communication port. In addition, it describes how to program the JTAG access security fuse that is available on all MSP430 devices. This document describes device access using both the standard 4-wire JTAG interface and the 2-wire JTAG interface, which is also referred to as Spy-Bi-Wire (SBW).
MSP430 Hardware Tools User's Guide
This manual describes the hardware of the TI MSP-FET430 Flash Emulation Tool (FET). The FET is the program development tool for the MSP430 ultra-low-power microcontroller. Both available interface types, the parallel port interface and the USB interface, are described.
Application Reports
MSP430 32-kHz Crystal Oscillators
Selection of the right crystal, correct load circuit, and proper board layout are important for a stable crystal oscillator. This application report summarizes crystal oscillator function and explains the parameters to select the correct crystal for MSP430 ultra-low-power operation. In addition, hints and examples for correct board layout are given. The document also contains detailed information on the possible oscillator tests to ensure stable oscillator operation in mass production.
MSP430 System-Level ESD Considerations
System-Level ESD has become increasingly demanding with silicon technology scaling towards lower voltages and the need for designing cost-effective and ultra-low-power components. This application report addresses three different ESD topics to help board designers and OEMs understand and design robust system-level designs: (1) Component-level ESD testing and system-level ESD testing, their differences and why component-level ESD rating does not ensure system-level robustness. (2) General design guidelines for system-level ESD protection at different levels including enclosures, cables, PCB layout, and on-board ESD protection devices. (3) Introduction to System Efficient ESD Design (SEED), a co-design methodology of on-board and on-chip ESD protection to achieve system-level ESD robustness, with example simulations and test results. A few real-world system-level ESD protection design examples and their results are also discussed.
Advanced Debugging Using the Enhanced Emulation Module (EEM) With CCS v6
This document describes the benefits of the Enhanced Emulation Module (EEM) advanced debugging features that are available in the MSP430 devices and how they can be used with Code Composer Studio (CCS) version 6 software development tool. The EEM advanced debugging features support both precision analog and full-speed digital debugging. The configuration of the debug environment for maximum control and the use of the embedded trace capability are described. Some techniques that allow rapid development and design-for-testability are demonstrated.