SLAS645L July   2009  – May 2020 MSP430F5500 , MSP430F5501 , MSP430F5502 , MSP430F5503 , MSP430F5504 , MSP430F5505 , MSP430F5506 , MSP430F5507 , MSP430F5508 , MSP430F5509 , MSP430F5510

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagrams
  2. 2Revision History
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
      1. Table 4-1 Terminal Functions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Thermal Resistance Characteristics
    7. 5.7  Schmitt-Trigger Inputs – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3, RST/NMI)
    8. 5.8  Inputs – Ports P1 and P2 (P1.0 to P1.7, P2.0 to P2.7)
    9. 5.9  Leakage Current – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7) (P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3, RST/NMI)
    10. 5.10 Outputs – General-Purpose I/O (Full Drive Strength) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    11. 5.11 Outputs – General-Purpose I/O (Reduced Drive Strength) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    12. 5.12 Output Frequency – General-Purpose I/O (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.4, P4.0 to P4.7, P5.0 to P5.5, P6.0 to P6.7, PJ.0 to PJ.3)
    13. 5.13 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    14. 5.14 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    15. 5.15 Crystal Oscillator, XT1, Low-Frequency Mode
    16. 5.16 Crystal Oscillator, XT2
    17. 5.17 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    18. 5.18 Internal Reference, Low-Frequency Oscillator (REFO)
    19. 5.19 DCO Frequency
    20. 5.20 PMM, Brownout Reset (BOR)
    21. 5.21 PMM, Core Voltage
    22. 5.22 PMM, SVS High Side
    23. 5.23 PMM, SVM High Side
    24. 5.24 PMM, SVS Low Side
    25. 5.25 PMM, SVM Low Side
    26. 5.26 Wake-up Times From Low-Power Modes and Reset
    27. 5.27 Timer_A
    28. 5.28 Timer_B
    29. 5.29 USCI (UART Mode) Clock Frequency
    30. 5.30 USCI (UART Mode)
    31. 5.31 USCI (SPI Master Mode) Clock Frequency
    32. 5.32 USCI (SPI Master Mode)
    33. 5.33 USCI (SPI Slave Mode)
    34. 5.34 USCI (I2C Mode)
    35. 5.35 10-Bit ADC, Power Supply and Input Range Conditions
    36. 5.36 10-Bit ADC, Timing Parameters
    37. 5.37 10-Bit ADC, Linearity Parameters
    38. 5.38 REF, External Reference
    39. 5.39 REF, Built-In Reference
    40. 5.40 Comparator B
    41. 5.41 Ports PU.0 and PU.1
    42. 5.42 USB Output Ports (DP and DM)
    43. 5.43 USB Input Ports (DP and DM)
    44. 5.44 USB-PWR (USB Power System)
    45. 5.45 USB-PLL (USB Phase-Locked Loop)
    46. 5.46 Flash Memory
    47. 5.47 JTAG and Spy-Bi-Wire Interface
  6. 6Detailed Description
    1. 6.1  CPU (Link to User's Guide)
    2. 6.2  Operating Modes
    3. 6.3  Interrupt Vector Addresses
    4. 6.4  Memory Organization
    5. 6.5  Bootloader (BSL)
      1. 6.5.1 USB BSL
      2. 6.5.2 UART BSL
    6. 6.6  JTAG Operation
      1. 6.6.1 JTAG Standard Interface
      2. 6.6.2 Spy-Bi-Wire Interface
    7. 6.7  Flash Memory (Link to User's Guide)
    8. 6.8  RAM (Link to User's Guide)
    9. 6.9  Peripherals
      1. 6.9.1  Digital I/O (Link to User's Guide)
      2. 6.9.2  Port Mapping Controller (Link to User's Guide)
      3. 6.9.3  Oscillator and System Clock (Link to User's Guide)
      4. 6.9.4  Power-Management Module (PMM) (Link to User's Guide)
      5. 6.9.5  Hardware Multiplier (MPY) (Link to User's Guide)
      6. 6.9.6  Real-Time Clock (RTC_A) (Link to User's Guide)
      7. 6.9.7  Watchdog Timer (WDT_A) (Link to User's Guide)
      8. 6.9.8  System Module (SYS) (Link to User's Guide)
      9. 6.9.9  DMA Controller (Link to User's Guide)
      10. 6.9.10 Universal Serial Communication Interface (USCI) (Links to User's Guide: UART Mode, SPI Mode, I2C Mode)
      11. 6.9.11 TA0 (Link to User's Guide)
      12. 6.9.12 TA1 (Link to User's Guide)
      13. 6.9.13 TA2 (Link to User's Guide)
      14. 6.9.14 TB0 (Link to User's Guide)
      15. 6.9.15 Comparator_B (Link to User's Guide)
      16. 6.9.16 ADC10_A (Link to User's Guide)
      17. 6.9.17 CRC16 (Link to User's Guide)
      18. 6.9.18 Reference (REF) Voltage Reference (Link to User's Guide)
      19. 6.9.19 Universal Serial Bus (USB) (Link to User's Guide)
      20. 6.9.20 Embedded Emulation Module (EEM) (S Version) (Link to User's Guide)
    10. 6.10 Peripheral File Map
    11. 6.11 Input/Output Diagrams
      1. 6.11.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 6.11.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 6.11.3  Port P3 (P3.0 to P3.4) Input/Output With Schmitt Trigger
      4. 6.11.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 6.11.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 6.11.6  Port P5 (P5.2) Input/Output With Schmitt Trigger
      7. 6.11.7  Port P5 (P5.3) Input/Output With Schmitt Trigger
      8. 6.11.8  Port P5 (P5.4 and P5.5) Input/Output With Schmitt Trigger
      9. 6.11.9  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      10. 6.11.10 Port U (PU.0/DP, PU.1/DM, PUR) USB Ports
      11. 6.11.11 Port J (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      12. 6.11.12 Port J (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    12. 6.12 Device Descriptors
  7. 7Device and Documentation Support
    1. 7.1  Getting Started and Next Steps
    2. 7.2  Device Nomenclature
    3. 7.3  Tools and Software
    4. 7.4  Documentation Support
    5. 7.5  Related Links
    6. 7.6  Community Resources
    7. 7.7  Trademarks
    8. 7.8  Electrostatic Discharge Caution
    9. 7.9  Export Control Notice
    10. 7.10 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Descriptors

Table 6-57 and Table 6-58 list the complete contents of the device descriptor tag-length-value (TLV) structure for each device type.

Table 6-57 F5504 to F5510 Device Descriptor Table (1)

DESCRIPTION ADDRESS SIZE
(bytes)
VALUE
F5510 F5509 F5508 F5507 F5506 F5505 F5504
RGC, ZXH, ZQE RGZ, PT RGC, ZXH, ZQE RGZ, PT RGC, ZXH, ZQE RGZ, PT
Info Block Info length 01A00h 1 06h 06h 06h 06h 06h 06h 06h 06h 06h 06h
CRC length 01A01h 1 06h 06h 06h 06h 06h 06h 06h 06h 06h 06h
CRC value 01A02h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Device ID 01A04h 1 31h 31h 3Ah 3Ah 39h 39h 38h 37h 36h 35h
Device ID 01A05h 1 80h 80h 80h 80h 80h 80h 80h 80h 80h 80h
Hardware revision 01A06h 1 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Firmware revision 01A07h 1 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Die Record Die record tag 01A08h 1 08h 08h 08h 08h 08h 08h 08h 08h 08h 08h
Die record length 01A09h 1 0Ah 0Ah 0Ah 0Ah 0Ah 0Ah 0Ah 0Ah 0Ah 0Ah
Lot/wafer ID 01A0Ah 4 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Die X position 01A0Eh 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Die Y position 01A10h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Test results 01A12h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC10 Calibration ADC10 calibration tag 01A14h 1 13h 13h 13h 13h 13h 13h 13h 13h 13h 13h
ADC10 calibration length 01A15h 1 10h 10h 10h 10h 10h 10h 10h 10h 10h 10h
ADC gain factor 01A16h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC offset 01A18h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 1.5-V reference
Temp. sensor 30°C
01A1Ah 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 1.5-V reference
Temp. sensor 85°C
01A1Ch 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 2.0-V reference
Temp. sensor 30°C
01A1Eh 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 2.0-V reference
Temp. sensor 85°C
01A20h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 2.5-V reference
Temp. sensor 30°C
01A22h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
ADC 2.5-V reference
Temp. sensor 85°C
01A24h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
REF Calibration REF calibration tag 01A26h 1 12h 12h 12h 12h 12h 12h 12h 12h 12h 12h
REF calibration length 01A27h 1 06h 06h 06h 06h 06h 06h 06h 06h 06h 06h
REF 1.5-V reference factor 01A28h 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
REF 2.0-V reference factor 01A2Ah 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
REF 2.5-V reference factor 01A2Ch 2 Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit Per unit
Peripheral Descriptor Peripheral descriptor tag 01A2Eh 1 02h 02h 02h 02h 02h 02h 02h 02h 02h 02h
Peripheral descriptor length 01A2Fh 1 61h 61h 62h 62h 61h 61h 5Dh 5Eh 5Dh 5Dh
Memory 1 2 08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
Memory 2 2 0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
Memory 3 2 0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
00Eh
2Ah
0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
Memory 4 2 12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
Memory 5 2 40h
92h
40h
92h
50h
91h
50h
91h
60h
90h
60h
90h
40h
92h
50h
91h
60h
90h
70h
8Eh
Memory 6 N/A N/A 8Eh 8Eh N/A N/A N/A 8Eh N/A N/A
Delimiter 1 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h
Peripheral count 1 20h 20h 20h 20h 20h 20h 1Eh 1Eh 1Eh 1Eh
MSP430CPUXV2 2 00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
00h
23h
JTAG 2 00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
00h
09h
SBW 2 00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
EEM-S 2 00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
00h
03h
TI BSL 2 00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
00h
FCh
SFR 2 10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
10h
41h
PMM 2 02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
02h
30h
FCTL 2 02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
02h
38h
CRC16 2 01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
CRC16_RB 2 00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
RAMCTL 2 00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
00h
44h
WDT_A 2 00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
00h
40h
UCS 2 01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
01h
48h
SYS 2 02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
02h
42h
REF 2 03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
03h
A0h
Port Mapping 2 01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
01h
10h
Port 1 and 2 2 04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
04h
51h
Port 3 and 4 2 02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
02h
52h
Port 5 and 6 2 02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
02h
53h
Peripheral Descriptor (continued) JTAG 2 0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
TA0 2 02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
02h
62h
TA1 2 04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
TB0 2 04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
04h
67h
TA2 2 04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
04h
61h
RTC 2 0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
MPY32 2 02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
02h
85h
DMA-3 2 04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
04h
47h
USCI_A and USCI_B 2 0Ch
90h
0Ch
90h
0Ch
90h
0Ch
90h
0Ch
90h
0Ch
90h
10h
90h
10h
90h
10h
90h
10h
90h
USCI_A and USCI_B 2 04h
90h
04h
90h
04h
90h
04h
90h
04h
90h
04h
90h
N/A N/A N/A N/A
ADC10_A 2 14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
14h
D3h
COMP_B 2 18h
A8h
18h
A8h
18h
A8h
18h
A8h
18h
A8h
18h
A8h
N/A N/A N/A N/A
USB 2 04h
98h
04h
98h
04h
98h
04h
98h
04h
98h
04h
98h
1Ch
98h
1Ch
98h
1Ch
98h
1Ch
98h
Interrupts COMP_B 1 A8h A8h A8h A8h A8h A8h 01h 01h 01h 01h
TB0.CCIFG0 1 64h 64h 64h 64h 64h 64h 64h 64h 64h 64h
TB0.CCIFG1..6 1 65h 65h 65h 65h 65h 65h 65h 65h 65h 65h
WDTIFG 1 40h 40h 40h 40h 40h 40h 40h 40h 40h 40h
USCI_A0 1 90h 90h 90h 90h 90h 90h 01h 01h 01h 01h
USCI_B0 1 91h 91h 91h 91h 91h 91h 01h 01h 01h 01h
ADC10_A 1 D0h D0h D0h D0h D0h D0h D0h D0h D0h D0h
TA0.CCIFG0 1 60h 60h 60h 60h 60h 60h 60h 60h 60h 60h
TA0.CCIFG1..4 1 61h 61h 61h 61h 61h 61h 61h 61h 61h 61h
USB 1 98h 98h 98h 98h 98h 98h 98h 98h 98h 98h
DMA 1 46h 46h 46h 46h 46h 46h 46h 46h 46h 46h
TA1.CCIFG0 1 62h 62h 62h 62h 62h 62h 62h 62h 62h 62h
TA1.CCIFG1..2 1 63h 63h 63h 63h 63h 63h 63h 63h 63h 63h
P1 1 50h 50h 50h 50h 50h 50h 50h 50h 50h 50h
USCI_A1 1 92h 92h 92h 92h 92h 92h 92h 92h 92h 92h
USCI_B1 1 93h 93h 93h 93h 93h 93h 93h 93h 93h 93h
TA1.CCIFG0 1 66h 66h 66h 66h 66h 66h 66h 66h 66h 66h
TA1.CCIFG1..2 1 67h 67h 67h 67h 67h 67h 67h 67h 67h 67h
P2 1 51h 51h 51h 51h 51h 51h 51h 51h 51h 51h
RTC_A 1 68h 68h 68h 68h 68h 68h 68h 68h 68h 68h
Delimiter 1 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h
N/A = Not applicable

Table 6-58 F5500 to F5503 Device Descriptor(1)

DESCRIPTION ADDRESS SIZE
(bytes)
VALUE
F5503 F5502 F5501 F5500
Info Block Info length 01A00h 1 06h 06h 06h 06h
CRC length 01A01h 1 06h 06h 06h 06h
CRC value 01A02h 2 Per unit Per unit Per unit Per unit
Device ID 01A04h 1 34h 33h 32h 3Bh
Device ID 01A05h 1 80h 80h 80h 80h
Hardware revision 01A06h 1 Per unit Per unit Per unit Per unit
Firmware revision 01A07h 1 Per unit Per unit Per unit Per unit
Die Record Die record tag 01A08h 1 08h 08h 08h 08h
Die record length 01A09h 1 0Ah 0Ah 0Ah 0Ah
Lot/wafer ID 01A0Ah 4 Per unit Per unit Per unit Per unit
Die X position 01A0Eh 2 Per unit Per unit Per unit Per unit
Die Y position 01A10h 2 Per unit Per unit Per unit Per unit
Test results 01A12h 2 Per unit Per unit Per unit Per unit
ADC10 Calibration Empty tag 01A14h 1 05h 05h 05h 05h
Empty tag length 01A15h 1 10h 10h 10h 10h
REF Calibration REF calibration tag 01A26h 1 12h 12h 12h 12h
REF calibration length 01A27h 1 06h 06h 06h 06h
REF 1.5-V reference factor 01A28h 2 Per unit Per unit Per unit Per unit
REF 2.0-V reference factor 01A2Ah 2 Per unit Per unit Per unit Per unit
REF 2.5-V reference factor 01A2Ch 2 Per unit Per unit Per unit Per unit
Peripheral Descriptor Peripheral descriptor tag 01A2Eh 1 02h 02h 02h 02h
Peripheral descriptor length 01A2Fh 1 5Dh 5Eh 5Dh 5Dh
Memory 1 2 08h
8Ah
08h
8Ah
08h
8Ah
08h
8Ah
Memory 2 2 0Ch
86h
0Ch
86h
0Ch
86h
0Ch
86h
Memory 3 2 0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
0Eh
2Ah
Memory 4 2 12h
2Ch
12h
2Ch
12h
2Ch
12h
2Ch
Memory 5 2 40h
92h
50h
91
60h
90h
70h
8Eh
Memory 6 1 N/A 8E N/A N/A
Delimiter 1 00h 00h 00h 00h
Peripheral count 1 1Eh 1Eh 1Eh 1Eh
MSP430CPUXV2 2 00h
23h
00h
23h
00h
23h
00h
23h
JTAG 2 00h
09h
00h
09h
00h
09h
00h
09h
SBW 2 00h
0Fh
00h
0Fh
00h
0Fh
00h
0Fh
EEM-S 2 00h
03h
00h
03h
00h
03h
00h
03h
TI BSL 2 00h
FCh
00h
FCh
00h
FCh
00h
FCh
SFR 2 10h
41h
10h
41h
10h
41h
10h
41h
PMM 2 02h
30h
02h
30h
02h
30h
02h
30h
FCTL 2 02h
38h
02h
38h
02h
38h
02h
38h
Peripheral Descriptor (continued) CRC16 2 01h
3Ch
01h
3Ch
01h
3Ch
01h
3Ch
CRC16_RB 2 00h
3Dh
00h
3Dh
00h
3Dh
00h
3Dh
RAMCTL 2 00h
44h
00h
44h
00h
44h
00h
44h
WDT_A 2 00h
40h
00h
40h
00h
40h
00h
40h
UCS 2 01h
48h
01h
48h
01h
48h
01h
48h
SYS 2 02h
42h
02h
42h
02h
42h
02h
42h
REF 2 03h
A0h
03h
A0h
03h
A0h
03h
A0h
Port Mapping 2 01h
10h
01h
10h
01h
10h
01h
10h
Port 1 and 2 2 04h
51h
04h
51h
04h
51h
04h
51h
Port 3 and 4 2 02h
52h
02h
52h
02h
52h
02h
52h
Port 5 and 6 2 02h
53h
02h
53h
02h
53h
02h
53h
JTAG 2 0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
0Eh
5Fh
TA0 2 02h
62h
02h
62h
02h
62h
02h
62h
TA1 2 04h
61h
04h
61h
04h
61h
04h
61h
TB0 2 04h
67h
04h
67h
04h
67h
04h
67h
TA2 2 04h
61h
04h
61h
04h
61h
04h
61h
RTC 2 0Ah
68h
0Ah
68h
0Ah
68h
0Ah
68h
MPY32 2 02h
85h
02h
85h
02h
85h
02h
85h
DMA-3 2 04h
47h
04h
47h
04h
47h
04h
47h
USCI_A and USCI_B 2 10h
90h
10h
90h
10h
90h
10h
90h
ADC10_A 2 N/A N/A N/A N/A
COMP_B 2 2Ch
A8h
2Ch
A8h
2Ch
A8h
2Ch
A8h
USB 2 04h
98h
04h
98h
04h
98h
04h
98h
Interrupts COMP_B 1 A8h A8h A8h A8h
TB0.CCIFG0 1 64h 64h 64h 64h
TB0.CCIFG1..6 1 65h 65h 65h 65h
WDTIFG 1 40h 40h 40h 40h
USCI_A0 1 01h 01h 01h 01h
USCI_B0 1 01h 01h 01h 01h
ADC10_A 1 01h 01h 01h 01h
TA0.CCIFG0 1 60h 60h 60h 60h
TA0.CCIFG1..4 1 61h 61h 61h 61h
USB 1 98h 98h 98h 98h
DMA 1 46h 46h 46h 46h
TA1.CCIFG0 1 62h 62h 62h 62h
TA1.CCIFG1..2 1 63h 63h 63h 63h
P1 1 50h 50h 50h 50h
USCI_A1 1 92h 92h 92h 92h
USCI_B1 1 93h 93h 93h 93h
TA1.CCIFG0 1 66h 66h 66h 66h
TA1.CCIFG1..2 1 67h 67h 67h 67h
P2 1 51h 51h 51h 51h
RTC_A 1 68h 68h 68h 68h
Delimiter 1 00h 00h 00h 00h
N/A = Not applicable