SLASEC3A August   2016  – August 2016 MSP430F6459-HIREL

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Comparison
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Signal Descriptions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 5.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 5.6  Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current
    7. 5.7  Schmitt-Trigger Inputs - General-Purpose I/O
    8. 5.8  Leakage Current - General-Purpose I/O
    9. 5.9  Outputs - General-Purpose I/O (Full Drive Strength)
    10. 5.10 Outputs - General-Purpose I/O (Reduced Drive Strength)
    11. 5.11 Thermal Resistance Characteristics for PZ Package
    12. 5.12 Typical Characteristics - Outputs, Reduced Drive Strength (PxDS.y = 0)
    13. 5.13 Typical Characteristics - Outputs, Full Drive Strength (PxDS.y = 1)
    14. 5.14 Timing and Switching Characteristics
      1. 5.14.1 Power Supply Sequencing
      2. 5.14.2 Clock Specifications
      3. 5.14.3 Peripherals
      4. 5.14.4 Emulation and Debug
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  CPU
    3. 6.3  Instruction Set
    4. 6.4  Operating Modes
    5. 6.5  Interrupt Vector Addresses
    6. 6.6  Memory Organization
    7. 6.7  Bootloader (BSL)
      1. 6.7.1 UART BSL
    8. 6.8  JTAG Operation
      1. 6.8.1 JTAG Standard Interface
      2. 6.8.2 Spy-Bi-Wire Interface
    9. 6.9  Flash Memory
    10. 6.10 Memory Integrity Detection (MID)
    11. 6.11 RAM
    12. 6.12 Backup RAM
    13. 6.13 Peripherals
      1. 6.13.1  Digital I/O
      2. 6.13.2  Port Mapping Controller
      3. 6.13.3  Oscillator and System Clock
      4. 6.13.4  Power-Management Module (PMM)
      5. 6.13.5  Hardware Multiplier (MPY)
      6. 6.13.6  Real-Time Clock (RTC_B)
      7. 6.13.7  Watchdog Timer (WDT_A)
      8. 6.13.8  System Module (SYS)
      9. 6.13.9  DMA Controller
      10. 6.13.10 Universal Serial Communication Interface (USCI)
      11. 6.13.11 Timer TA0
      12. 6.13.12 Timer TA1
      13. 6.13.13 Timer TA2
      14. 6.13.14 Timer TB0
      15. 6.13.15 Comparator_B
      16. 6.13.16 ADC12_A
      17. 6.13.17 DAC12_A
      18. 6.13.18 CRC16
      19. 6.13.19 Voltage Reference (REF) Module
      20. 6.13.20 LCD_B
      21. 6.13.21 LDO and PU Port
      22. 6.13.22 Embedded Emulation Module (EEM) (L Version)
      23. 6.13.23 Peripheral File Map
    14. 6.14 Input/Output Schematics
      1. 6.14.1  Port P1, P1.0 to P1.7, Input/Output With Schmitt Trigger
      2. 6.14.2  Port P2, P2.0 to P2.7, Input/Output With Schmitt Trigger
      3. 6.14.3  Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger
      4. 6.14.4  Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger
      5. 6.14.5  Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
      6. 6.14.6  Port P5, P5.2 to P5.7, Input/Output With Schmitt Trigger
      7. 6.14.7  Port P6, P6.0 to P6.7, Input/Output With Schmitt Trigger
      8. 6.14.8  Port P7, P7.2, Input/Output With Schmitt Trigger
      9. 6.14.9  Port P7, P7.3, Input/Output With Schmitt Trigger
      10. 6.14.10 Port P7, P7.4 to P7.7, Input/Output With Schmitt Trigger
      11. 6.14.11 Port P8, P8.0 to P8.7, Input/Output With Schmitt Trigger
      12. 6.14.12 Port P9, P9.0 to P9.7, Input/Output With Schmitt Trigger
      13. 6.14.13 Port PU.0, PU.1 Ports
      14. 6.14.14 Port J, PJ.0 JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      15. 6.14.15 Port J, PJ.1 to PJ.3 JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    15. 6.15 Device Descriptors
  7. 7Applications, Implementation, and Layout
    1. 7.1 Device Connection and Layout Fundamentals
      1. 7.1.1 Power Supply Decoupling and Bulk Capacitors
      2. 7.1.2 External Oscillator
      3. 7.1.3 JTAG
      4. 7.1.4 Reset
      5. 7.1.5 General Layout Recommendations
      6. 7.1.6 Do's and Don'ts
    2. 7.2 Peripheral- and Interface-Specific Design Information
      1. 7.2.1 ADC12_B Peripheral
        1. 7.2.1.1 Partial Schematic
        2. 7.2.1.2 Design Requirements
        3. 7.2.1.3 Detailed Design Procedure
        4. 7.2.1.4 Layout Guidelines
  8. 8Device and Documentation Support
    1. 8.1  Getting Started and Next Steps
    2. 8.2  Device Nomenclature
    3. 8.3  Tools and Software
      1. 8.3.1 Hardware Features
      2. 8.3.2 Recommended Hardware Options
        1. 8.3.2.1 Target Socket Boards
        2. 8.3.2.2 Experimenter Boards
        3. 8.3.2.3 Debugging and Programming Tools
        4. 8.3.2.4 Production Programmers
      3. 8.3.3 Recommended Software Options
        1. 8.3.3.1 Integrated Development Environments
        2. 8.3.3.2 MSP430Ware
        3. 8.3.3.3 TI-RTOS
        4. 8.3.3.4 Command-Line Programmer
    4. 8.4  Documentation Support
    5. 8.5  Receiving Notification of Documentation Updates
    6. 8.6  Community Resources
    7. 8.7  Trademarks
    8. 8.8  Electrostatic Discharge Caution
    9. 8.9  Export Control Notice
    10. 8.10 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Device and Documentation Support

8.1 Getting Started and Next Steps

For more information on the MSP430™ family of devices and the tools and libraries that are available to help with your development, visit the Getting Started page.

8.2 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all MSP430 MCU devices and support tools. Each MSP430 MCU commercial family member has one of three prefixes: MSP, PMS, or XMS (for example, MSP430F5438A). TI recommends two of three possible prefix designators for its support tools: MSP and MSPX. These prefixes represent evolutionary stages of product development from engineering prototypes (with XMS for devices and MSPX for tools) through fully qualified production devices and tools (with MSP for devices and MSP for tools).

Device development evolutionary flow:

XMS – Experimental device that is not necessarily representative of the electrical specifications for the final device

PMS – Final silicon die that conforms to the electrical specifications for the device but has not completed quality and reliability verification

MSP – Fully qualified production device

Support tool development evolutionary flow:

MSPX – Development-support product that has not yet completed TI's internal qualification testing.

MSP – Fully-qualified development-support product

XMS and PMS devices and MSPX development-support tools are shipped against the following disclaimer:

"Developmental product is intended for internal evaluation purposes."

MSP devices and MSP development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (XMS and PMS) have a greater failure rate than the standard production devices. TI recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, PZP) and temperature range (for example, T). Figure 8-1 provides a legend for reading the complete device name for any family member.

MSP430F6459-HIREL Part_Number_Decoder_MSP430.gif Figure 8-1 Device Nomenclature

8.3 Tools and Software

All MSP430™ microcontrollers are supported by a wide variety of software and hardware development tools. Tools are available from TI and various third parties. See them all at www.ti.com/msp430tools.

8.3.1 Hardware Features

See the Code Composer Studio for MSP430 User's Guide (SLAU157) for details on the available features.

MSP430 ARCHITECTURE 4-WIRE JTAG 2-WIRE JTAG BREAK- POINTS
(N)		 RANGE BREAK- POINTS CLOCK CONTROL STATE SEQUENCER TRACE BUFFER LPMx.5 DEBUGGING SUPPORT
MSP430Xv2 Yes Yes 8 Yes Yes Yes Yes Yes

8.3.2 Recommended Hardware Options

8.3.2.1 Target Socket Boards

The target socket boards allow easy programming and debugging of the device using JTAG. They also feature header pin outs for prototyping. Target socket boards are orderable individually or as a kit with the JTAG programmer and debugger included. The following table shows the compatible target boards and the supported packages.

PACKAGE TARGET BOARD AND PROGRAMMER BUNDLE TARGET BOARD ONLY
100-pin LQFP (PZ) MSP-FET430U100USB MSP-TS430PZ100USB

8.3.2.2 Experimenter Boards

Experimenter Boards and Evaluation kits are available for some MSP430 devices. These kits feature additional hardware components and connectivity for full system evaluation and prototyping. See www.ti.com/msp430tools for details.

8.3.2.3 Debugging and Programming Tools

Hardware programming and debugging tools are available from TI and from its third-party suppliers. See the full list of available tools at www.ti.com/msp430tools.

8.3.2.4 Production Programmers

The production programmers expedite loading firmware to devices by programming several devices simultaneously.

PART NUMBER PC PORT FEATURES PROVIDER
MSP-GANG Serial and USB Program up to eight devices at a time. Works with a PC or as a stand-alone package. Texas Instruments

8.3.3 Recommended Software Options

8.3.3.1 Integrated Development Environments

Software development tools are available from TI or from third parties. Open source solutions are also available.

This device is supported by the Code Composer Studio™ IDE (CCS).

8.3.3.2 MSP430Ware

MSP430Ware is a collection of code examples, data sheets, and other design resources for all MSP430 devices delivered in a convenient package. In addition to providing a complete collection of existing MSP430 design resources, MSP430Ware also includes a high-level API called MSP430 Driver Library. This library makes it easy to program MSP430 hardware. MSP430Ware is available as a component of CCS or as a stand-alone package.

8.3.3.3 TI-RTOS

TI-RTOS is an advanced real-time operating system for the MSP430 microcontrollers. It features preemptive deterministic multitasking, hardware abstraction, memory management, and real-time analysis. TI-RTOS is available free of charge and is provided with full source code.

8.3.3.4 Command-Line Programmer

MSP430 Flasher is an open-source shell-based interface for programming MSP430 microcontrollers through a FET programmer or eZ430™ development tool using JTAG or Spy-Bi-Wire (SBW) communication. MSP430 Flasher can be used to download binary files (.txt or .hex) files directly to the MSP430 Flash without the need for an IDE.

8.4 Documentation Support

To receive notification of documentation updates, navigate to the device product folder on ti.com (GPN1, GPN2, …). In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

The following documents describe the MSP430F665x, MSP430F645x, MSP430F565x, and MSP430F535x devices. Copies of these documents are available on the Internet at www.ti.com.

    SLAZ491MSP430F6459-Hirel Device Erratasheet. Describes the known exceptions to the functional specifications for all silicon revisions of this device.
    SLAU278 MSP430 Hardware Tools User's Guide. This manual describes the hardware of the TI MSP-FET430 Flash Emulation Tool (FET). The FET is the program development tool for the MSP430 ultra-low-power microcontroller. Both available interface types, the parallel port interface and the USB interface, are described.
    SLAU319 MSP430 Programming With the Bootloader (BSL). The MSP430 bootloader (BSL) allows users to communicate with embedded memory in the MSP430 microcontroller during the prototyping phase, final production, and in service. Both the programmable memory (flash memory) and the data memory (RAM) can be modified as required. Do not confuse the bootloader with the bootstrap loader programs found in some digital signal processors (DSPs) that automatically load program code (and data) from external memory to the internal memory of the DSP.
    SLAU320 MSP430 Programming Via the JTAG Interface. This document describes the functions that are required to erase, program, and verify the memory module of the MSP430 flash-based and FRAM-based microcontroller families using the JTAG communication port. In addition, it describes how to program the JTAG access security fuse that is available on all MSP430 MCUs. This document describes access to the MCU using both the standard 4-wire JTAG interface and the 2-wire JTAG interface, which is also referred to as Spy-Bi-Wire (SBW).
    SLAA322 MSP430 32-kHz Crystal Oscillators. Selection of the right crystal, correct load circuit, and proper board layout are important for a stable crystal oscillator. This application report summarizes crystal oscillator function and explains the parameters to select the correct crystal for MSP430 ultra-low power operation. In addition, hints and examples for correct board layout are given. The document also contains detailed information on the possible oscillator tests to ensure stable oscillator operation in mass production.
    SLOA089 Circuit Board Layout Techniques. Op amp circuitry is analog circuitry and is very different from digital circuitry. It must be partitioned in its own section of the board using special layout techniques. Printed circuit board effects become most apparent in high-speed analog circuits, but common mistakes described in this chapter can even affect the performance of audio circuits. The purpose of this chapter is to discuss some of the more common mistakes made by designers and how they degrade performance, and to provide simple fixes to avoid the problems.
    SLAA530 MSP430 System-Level ESD Considerations. System-Level ESD has become increasingly demanding with silicon technology scaling towards lower voltages and the need for designing cost-effective and ultra-low-power components. This application report addresses three different ESD topics to help board designers and OEMs understand and design robust system-level designs.

8.5 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

8.6 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

TI E2E™ Community
TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers.

TI Embedded Processors Wiki
Texas Instruments Embedded Processors Wiki. Established to help developers get started with embedded processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

8.7 Trademarks

MSP430, the Code Composer Studio, eZ430, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

8.8 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.9 Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled product restricted by other applicable national regulations, received from disclosing party under nondisclosure obligations (if any), or any direct product of such technology, to any destination to which such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S. Department of Commerce and other competent Government authorities to the extent required by those laws.

8.10 Glossary

    TI Glossary This glossary lists and explains terms, acronyms, and definitions.