SLAS982 Data sheet

SLAS982A May 2014 – September 2018 MSP430F6745A , MSP430F6746A , MSP430F6747A , MSP430F6748A , MSP430F6749A , MSP430F6765A , MSP430F6766A , MSP430F6767A , MSP430F6768A , MSP430F6769A , MSP430F6775A , MSP430F6776A , MSP430F6777A , MSP430F6778A , MSP430F6779A

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

PEU|128
- MPQF058B
PZ|100
- MTQF013A

Thermal pad, mechanical data (Package|Pins)

Orderable Information

Table 5-54 JTAG and Spy-Bi-Wire (SBW) Interface

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		V_CC	MIN	TYP	MAX	UNIT
f_SBW	Spy-Bi-Wire input frequency	2.2 V, 3 V	0		20	MHz
t_SBW,Low	Spy-Bi-Wire low clock pulse duration	2.2 V, 3 V	0.025		15	µs
t_{SBW, En}	Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge)⁽¹⁾	2.2 V, 3 V			1	µs
t_SBW,Rst	Spy-Bi-Wire return to normal operation time		15		100	µs
f_TCK	TCK input frequency for 4-wire JTAG⁽²⁾	2.2 V	0		5	MHz
f_TCK	TCK input frequency for 4-wire JTAG⁽²⁾	3 V	0		10	MHz
R_internal	Internal pulldown resistance on TEST	2.2 V, 3 V	45	60	80	kΩ

(1) Tools that access the Spy-Bi-Wire interface must wait for the minimum t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the first SBWTCK clock edge.

(2) f_TCK may be restricted to meet the timing requirements of the module selected.