SLASE58E February 2016 – December 2019 MSP430FR2310 , MSP430FR2311
PRODUCTION DATA.
The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin enables the JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO pin interfaces with MSP430 development tools and device programmers. Table 6-6 lists the JTAG pin requirements. For further details on interfacing to development tools and device programmers, see the MSP430 Hardware Tools User's Guide.
DEVICE SIGNAL | DIRECTION | JTAG FUNCTION |
---|---|---|
P1.4/UCA0STE/TCK/OA0+/A4 | IN | JTAG clock input |
P1.5/UCA0CLK/TMS/TRI0O/A5 | IN | JTAG state control |
P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK/TRI0-/A6 | IN | JTAG data input and TCLK input |
P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO/TRI0+/A7/VREF+ | OUT | JTAG data output |
TEST/SBWTCK | IN | Enable JTAG pins |
RST/NMI/SBWTDIO | IN | External reset |
VCC | Power supply | |
VSS | Ground supply |