SLASEE4C January 2018 – December 2019 MSP430FR2512 , MSP430FR2522
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Table 4-1 lists the attributes of all pins.
PIN NUMBER | SIGNAL NAME(1)(4) | SIGNAL TYPE(2) | BUFFER TYPE(3) | POWER SOURCE(5) | RESET STATE AFTER BOR(6) | |
---|---|---|---|---|---|---|
RHL | PW16 | |||||
1 | 1 | P1.1 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0CLK | I/O | LVCMOS | DVCC | – | ||
ACLK | I/O | LVCMOS | DVCC | – | ||
CAP1.1(7) | I/O | Analog | VREG | – | ||
A1 | I | Analog | DVCC | – | ||
VREF+ | I | Analog | Power | – | ||
2 | 2 | P1.0 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0STE | I/O | LVCMOS | DVCC | – | ||
CAP1.0(7) | I/O | Analog | VREG | – | ||
A0 | I | Analog | DVCC | – | ||
Veref+ | I | Analog | Power | – | ||
3 | 3 | TEST (RD) | I | LVCMOS | DVCC | OFF |
SBWTCK | I | LVCMOS | DVCC | – | ||
4 | 4 | RST (RD) | I | LVCMOS | DVCC | OFF |
NMI | I | LVCMOS | DVCC | – | ||
SBWTDIO | I/O | LVCMOS | DVCC | – | ||
5 | 5 | DVCC | P | Power | DVCC | N/A |
6 | 6 | DVSS | P | Power | DVCC | N/A |
7 | 7 | P2.1 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0RXD | I | LVCMOS | DVCC | – | ||
UCA0SOMI | I/O | LVCMOS | DVCC | – | ||
XIN | I | LVCMOS | DVCC | – | ||
8 | 8 | P2.0 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0TXD | O | LVCMOS | DVCC | – | ||
UCA0SIMO | I/O | LVCMOS | DVCC | – | ||
XOUT | O | LVCMOS | DVCC | – | ||
9 | – | P2.6 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0SOMI | I/O | LVCMOS | DVCC | – | ||
UCB0SCL | I/O | LVCMOS | DVCC | – | ||
10 | – | P2.5 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0SIMO | I/O | LVCMOS | DVCC | – | ||
UCB0SDA | I/O | LVCMOS | DVCC | – | ||
A7 | I | Analog | DVCC | – | ||
11 | – | P2.4 (RD) | I/O | LVCMOS | DVCC | OFF |
TA1CLK | I | LVCMOS | DVCC | – | ||
UCB0CLK | I/O | LVCMOS | DVCC | – | ||
A6 | I | Analog | DVCC | – | ||
12 | – | P2.3 (RD) | I/O | LVCMOS | DVCC | OFF |
TA1.2 | I/O | LVCMOS | DVCC | – | ||
UCB0STE | I/O | LVCMOS | DVCC | – | ||
A5 | I | Analog | DVCC | – | ||
13 | 9 | P2.2 (RD) | I/O | LVCMOS | DVCC | OFF |
TA1.1 | I/O | LVCMOS | DVCC | – | ||
SYNC | I | LVCMOS | DVCC | – | ||
A4 | I | Analog | DVCC | – | ||
14 | 10 | P1.7 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0STE | I/O | LVCMOS | DVCC | – | ||
TDO | O | LVCMOS | DVCC | – | ||
CAP0.3 | I/O | Analog | VREG | – | ||
15 | 11 | P1.6 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0CLK | I/O | LVCMOS | DVCC | – | ||
TA0CLK | I | LVCMOS | DVCC | – | ||
TDI | I | LVCMOS | DVCC | – | ||
TCLK | I | LVCMOS | DVCC | – | ||
CAP0.2 | I/O | Analog | VREG | – | ||
16 | 12 | P1.5 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0RXD | I | LVCMOS | DVCC | – | ||
UCA0SOMI | I/O | LVCMOS | DVCC | – | ||
TA0.2 | I/O | LVCMOS | DVCC | – | ||
TMS | I | LVCMOS | DVCC | – | ||
CAP0.1 | I/O | Analog | VREG | – | ||
17 | 13 | P1.4 (RD) | I/O | LVCMOS | DVCC | OFF |
UCA0TXD | O | LVCMOS | DVCC | – | ||
UCA0SIMO | I/O | LVCMOS | DVCC | – | ||
TA0.1 | I/O | LVCMOS | DVCC | – | ||
TCK | I | LVCMOS | DVCC | – | ||
CAP0.0 | I/O | Analog | VREG | – | ||
18 | 14 | VREG | P | Power | VREG | N/A |
19 | 15 | P1.3 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0SOMI | I/O | LVCMOS | DVCC | – | ||
UCB0SCL | I/O | LVCMOS | DVCC | – | ||
MCLK | O | LVCMOS | DVCC | – | ||
CAP1.3(7) | I/O | Analog | VREG | – | ||
A3 | I | Analog | DVCC | – | ||
20 | 16 | P1.2 (RD) | I/O | LVCMOS | DVCC | OFF |
UCB0SIMO | I/O | LVCMOS | DVCC | – | ||
UCB0SDA | I/O | LVCMOS | DVCC | – | ||
SMCLK | O | LVCMOS | DVCC | – | ||
CAP1.2(7) | I/O | Analog | VREG | – | ||
A2 | I | Analog | DVCC | – | ||
Veref- | I | Analog | Power | – |