SLAS865F October 2014 – December 2021 MSP430FR4131 , MSP430FR4132 , MSP430FR4133
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | VCC | MIN | MAX | UNIT | |
---|---|---|---|---|---|---|
tSTE,LEAD | STE lead time, STE active to clock | UCSTEM = 1, UCMODEx = 01 or 10 | 1 | UCxCLK cycles | ||
tSTE,LAG | STE lag time, Last clock to STE inactive | UCSTEM = 1, UCMODEx = 01 or 10 | 1 | UCxCLK cycles | ||
tSU,MI | SOMI input data setup time | 2 V | 45 | ns | ||
3 V | 35 | |||||
tHD,MI | SOMI input data hold time | 2 V | 0 | ns | ||
3 V | 0 | |||||
tVALID,MO | SIMO output data valid time(2) | UCLK edge to SIMO valid, CL = 20 pF | 2 V | 20 | ns | |
3 V | 20 | |||||
tHD,MO | SIMO output data hold time(3) | CL = 20 pF | 2 V | 0 | ns | |
3 V | 0 |
Section 8.12.6.5 lists the switching characteristics of the eUSCI in SPI slave mode.