SLAS865F
October 2014 – December 2021
MSP430FR4131
,
MSP430FR4132
,
MSP430FR4133
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Functional Block Diagram
5
Revision History
6
Device Comparison
6.1
Related Products
7
Terminal Configuration and Functions
7.1
Pin Diagrams
7.2
Signal Descriptions
7.3
Pin Multiplexing
7.4
Connection of Unused Pins
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Active Mode Supply Current Into VCC Excluding External Current
8.5
Active Mode Supply Current Per MHz
8.6
Low-Power Mode LPM0 Supply Currents Into VCC Excluding External Current
8.7
Low-Power Mode LPM3, LPM4 Supply Currents (Into VCC) Excluding External Current
8.8
Low-Power Mode LPMx.5 Supply Currents (Into VCC) Excluding External Current
8.9
Typical Characteristics, Low-Power Mode Supply Currents
8.10
Current Consumption Per Module
8.11
Thermal Characteristics
8.12
Timing and Switching Characteristics
8.12.1
Power Supply Sequencing
8.12.1.1
PMM, SVS and BOR
8.12.2
Reset Timing
8.12.2.1
Wake-up Times From Low-Power Modes and Reset
8.12.3
Clock Specifications
8.12.3.1
XT1 Crystal Oscillator (Low Frequency)
8.12.3.2
DCO FLL, Frequency
8.12.3.3
REFO
8.12.3.4
Internal Very-Low-Power Low-Frequency Oscillator (VLO)
8.12.3.5
Module Oscillator Clock (MODCLK)
8.12.4
Digital I/Os
8.12.4.1
Digital Inputs
8.12.4.2
Digital Outputs
8.12.4.3
Digital I/O Typical Characteristics
8.12.5
Timer_A
8.12.5.1
Timer_A
8.12.6
eUSCI
8.12.6.1
eUSCI (UART Mode) Operating Frequency
8.12.6.2
eUSCI (UART Mode) Switching Characteristics
8.12.6.3
eUSCI (SPI Master Mode) Operating Frequency
8.12.6.4
eUSCI (SPI Master Mode) Switching Characteristics
8.12.6.5
eUSCI (SPI Slave Mode) Switching Characteristics
8.12.6.6
eUSCI (I2C Mode) Switching Characteristics
8.12.7
ADC
8.12.7.1
ADC, Power Supply and Input Range Conditions
8.12.7.2
ADC, 10-Bit Timing Parameters
8.12.7.3
ADC, 10-Bit Linearity Parameters
8.12.8
LCD Controller
8.12.8.1
LCD Recommended Operating Conditions
8.12.9
FRAM
8.12.9.1
FRAM
8.12.10
Emulation and Debug
8.12.10.1
JTAG and Spy-Bi-Wire Interface
9
Detailed Description
9.1
CPU
9.2
Operating Modes
9.3
Interrupt Vector Addresses
9.4
Bootloader (BSL)
9.5
JTAG Standard Interface
9.6
Spy-Bi-Wire Interface (SBW)
9.7
FRAM
9.8
Memory Protection
9.9
Peripherals
9.9.1
Power Management Module (PMM) and On-Chip Reference Voltages
9.9.2
Clock System (CS) and Clock Distribution
9.9.3
General-Purpose Input/Output Port (I/O)
9.9.4
Watchdog Timer (WDT)
9.9.5
System Module (SYS)
9.9.6
Cyclic Redundancy Check (CRC)
9.9.7
Enhanced Universal Serial Communication Interface (eUSCI_A0, eUSCI_B0)
9.9.8
Timers (Timer0_A3, Timer1_A3)
9.9.9
Real-Time Clock (RTC) Counter
9.9.10
10-Bit Analog Digital Converter (ADC)
9.9.11
Liquid Crystal Display (LCD)
9.9.12
Embedded Emulation Module (EEM)
9.9.13
Input/Output Schematics
9.9.13.1
Port P1 Input/Output With Schmitt Trigger
9.9.13.2
Port P2 Input/Output With Schmitt Trigger
9.9.13.3
Port P3 Input/Output With Schmitt Trigger
9.9.13.4
Port P4.0 Input/Output With Schmitt Trigger
9.9.13.5
Port P4.1 and P4.2 Input/Output With Schmitt Trigger
9.9.13.6
Port 4.3, P4.4, P4.5, P4.6, and P4.7 Input/Output With Schmitt Trigger
9.9.13.7
Port P5.0, P5.1, P5.2, and P5.3 Input/Output With Schmitt Trigger
9.9.13.8
Port P5.4, P5.5, P5.6, and P5.7 Input/Output With Schmitt Trigger
9.9.13.9
Port P6 Input/Output With Schmitt Trigger
9.9.13.10
Port P7 Input/Output With Schmitt Trigger
9.9.13.11
Port P8.0 and P8.1 Input/Output With Schmitt Trigger
9.9.13.12
Port P8.2 and P8.3 Input/Output With Schmitt Trigger
9.10
Device Descriptors (TLV)
9.11
Memory
9.11.1
Peripheral File Map
9.12
Identification
9.12.1
Revision Identification
9.12.2
Device Identification
9.12.3
JTAG Identification
10
Applications, Implementation, and Layout
10.1
Device Connection and Layout Fundamentals
10.1.1
Power Supply Decoupling and Bulk Capacitors
10.1.2
External Oscillator
10.1.3
JTAG
10.1.4
Reset
10.1.5
Unused Pins
10.1.6
General Layout Recommendations
10.1.7
Do's and Don'ts
10.2
Peripheral- and Interface-Specific Design Information
10.2.1
ADC Peripheral
10.2.1.1
Partial Schematic
10.2.1.2
Design Requirements
10.2.1.3
Layout Guidelines
10.2.2
LCD_E Peripheral
10.2.2.1
Partial Schematic
10.2.2.2
Design Requirements
10.2.2.3
Detailed Design Procedure
10.2.2.4
Layout Guidelines
10.2.3
Timer
10.2.3.1
Generate Accurate PWM Using Internal Oscillator
10.3
Typical Applications
11
Device and Documentation Support
11.1
Getting Started
11.2
Device Nomenclature
11.3
Tools and Software
11.4
Documentation Support
11.5
Support Resources
11.6
Trademarks
11.7
Electrostatic Discharge Caution
11.8
Export Control Notice
11.9
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PM|64
MTQF008B
DGG|48
MPDS583
DGG|56
MPDS570
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slas865f_oa
slas865f_pm
2
Applications
Remote controls
Thermostats
Water meters
Heat meters
Gas meters
One-time password tokens
Blood glucose monitors
Blood pressure monitors