SLASE23 Data sheet

SLASE23E January 2015 – August 2018 MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

PM|64
- MTQF008B
RGC|64
- MPQF125F
DGG|56
- MPDS570

Thermal pad, mechanical data (Package|Pins)

RGC|64
- QFND102O

Orderable Information

Table 5-9 Wake-up Times From Low-Power Modes and Reset

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	V_CC	TYP	MAX	UNIT
t_{WAKE-UP FRAM}	Additional wake-up time to activate the FRAM in AM if previously disabled by the FRAM controller or from an LPM if immediate activation is selected			6	10	μs
t_{WAKE-UP LPM0}	Wake-up time from LPM0 to active mode	MCLKREQEN = 1 ⁽¹⁾	2.2 V, 3.0 V		400 ns + 1.5 / f_DCO
t_{WAKE-UP LPM0}	Wake-up time from LPM0 to active mode	MCLKREQEN = 0 ⁽¹⁾⁽²⁾	2.2 V, 3.0 V		400 ns + 2.5 / f_DCO
t_{WAKE-UP LPM1}	Wake-up time from LPM1 to active mode⁽¹⁾		2.2 V, 3.0 V	6		μs
t_{WAKE-UP LPM2}	Wake-up time from LPM2 to active mode⁽¹⁾		2.2 V, 3.0 V	6		μs
t_{WAKE-UP LPM3}	Wake-up time from LPM3 to active mode⁽¹⁾		2.2 V, 3.0 V	7	10	μs
t_{WAKE-UP LPM4}	Wake-up time from LPM4 to active mode⁽¹⁾		2.2 V, 3.0 V	7	10	μs
t_{WAKE-UP LPM3.5}	Wake-up time from LPM3.5 to active mode⁽³⁾		2.2 V, 3.0 V	250	350	μs
t_{WAKE-UP LPM4.5}	Wake-up time from LPM4.5 to active mode⁽³⁾	SVSHE = 1	2.2 V, 3.0 V	250	350	μs
t_{WAKE-UP LPM4.5}	Wake-up time from LPM4.5 to active mode⁽³⁾	SVSHE = 0	2.2 V, 3.0 V	0.4	0.8	ms
t_WAKE-UP-RST	Wake-up time from a RST pin triggered reset to active mode⁽³⁾		2.2 V, 3.0 V	250	350	μs
t_WAKE-UP-BOR	Wake-up time from power-up to active mode ⁽³⁾		2.2 V, 3.0 V	0.5	1.0	ms

(1) The wake-up time is measured from the edge of an external wake-up signal (for example, port interrupt or wake-up event) to the first externally observable MCLK clock edge with MCLKREQEN = 1. This time includes the activation of the FRAM during wakeup.

(2) With MCLKREQEN = 0, the MCLK is gated one additoinal one clock cycle (wake from LPM0, LPM1, LPM2, LPM3, and LPM4). The device wake-up time is not affected by the status of the MCLKREQEN bit.

(3) The wake-up time is measured from the edge of an external wake-up signal (for example, port interrupt or wake-up event) until the first instruction of the user program is executed.

Table 5-10 lists the typical charge required for wakeup.