SLASE23E January 2015 – August 2018 MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721
PRODUCTION DATA.
Figure 6-8 and Figure 6-9 show the port diagrams. Table 6-33 summarizes the selection of the pin functions.
PIN NAME (PJ.x) | x | FUNCTION | CONTROL BITS OR SIGNALS (1) | |||||
---|---|---|---|---|---|---|---|---|
PJDIR.x | PJSEL1.7 | PJSEL0.7 | PJSEL1.6 | PJSEL0.6 | HFXTBYPASS | |||
PJ.6/HFXIN | 6 | PJ.6 (I/O) | I: 0; O: 1 | X | X | 0 | 0 | X |
N/A | 0 | X | X | 1 | X | X | ||
Internally tied to DVSS | 1 | |||||||
HFXIN crystal mode(2) | X | X | X | 0 | 1 | 0 | ||
HFXIN bypass mode(2) | X | X | X | 0 | 1 | 1 | ||
PJ.7/HFXOUT | 7 | PJ.7 (I/O) | I: 0; O: 1 | 0 | 0 | 0 | 0 | 0 |
1 | X | |||||||
X | X | 1(3) | ||||||
N/A | 0 | See (1) | See (1) | 0 | 0 | 0 | ||
1 | X | |||||||
X | X | 1(3) | ||||||
Internally tied to DVSS | 1 | See (1) | See (1) | 0 | 0 | 0 | ||
1 | X | |||||||
X | X | 1(3) | ||||||
HFXOUT crystal mode(2) | X | X | X | 0 | 1 | 0 |