SLASFA2 November   2024 MSPM0G1519 , MSPM0G3519

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 SYSOSC Typical Frequency Accuracy
      3. 7.9.3 Low Frequency Oscillator (LFOSC)
      4. 7.9.4 System Phase Lock Loop (SYSPLL)
      5. 7.9.5 Low Frequency Crystal/Clock
      6. 7.9.6 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 DAC
      1. 7.16.1 DAC_Supply Specifications
      2. 7.16.2 DAC Output Specifications
      3. 7.16.3 DAC Dynamic Specifications
      4. 7.16.4 DAC Linearity Specifications
      5. 7.16.5 DAC Timing Specifications
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 TIMx
    21. 7.21 TRNG
      1. 7.21.1 TRNG Electrical Characteristics
      2. 7.21.2 TRNG Switching Characteristics
    22. 7.22 Emulation and Debug
      1. 7.22.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0Gx51x)
    4. 8.4  Security
    5. 8.5  Power Management Unit (PMU)
    6. 8.6  Clock Module (CKM)
    7. 8.7  DMA
    8. 8.8  Events
    9. 8.9  Memory
      1. 8.9.1 Memory Organization
      2. 8.9.2 Peripheral File Map
      3. 8.9.3 Peripheral Interrupt Vector
    10. 8.10 Flash Memory
    11. 8.11 SRAM
    12. 8.12 GPIO
    13. 8.13 IOMUX
    14. 8.14 ADC
    15. 8.15 Temperature Sensor
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 DAC
    19. 8.19 TRNG
    20. 8.20 AESADV
    21. 8.21 Keystore
    22. 8.22 CRC-P
    23. 8.23 MATHACL
    24. 8.24 UART
    25. 8.25 I2C
    26. 8.26 SPI
    27. 8.27 CAN-FD
    28. 8.28 Low-Frequency Sub System (LFSS)
    29. 8.29 RTC_B
    30. 8.30 IWDT_B
    31. 8.31 WWDT
    32. 8.32 Timers (TIMx)
    33. 8.33 Device Analog Connections
    34. 8.34 Input/Output Diagrams
    35. 8.35 Serial Wire Debug Interface
    36. 8.36 Boot Strap Loader (BSL)
    37. 8.37 Device Factory Constants
    38. 8.38 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.9.1 Memory Organization

Table 8-4 summarizes the memory map of the devices. For more information about the memory region detail, see the Platform Memory Map section in the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

Table 8-4 Memory Organization

MEMORY REGION

SUBREGION

MSPM0G1518, MSPM0G3518

MSPM0G1519, MSPM0G3519

Code (Flash Bank 0)

MAIN ECC Corrected

128KB

256KB

0x0000.0000 to 0x0001.FFFF

0x0000.0000 to 0x0003.FFFF

MAIN ECC Uncorrected

0x0040.0000 to 0x0041.FFFF

0x0040.0000 to 0x0043.FFFF

Flash ECC code

0x0080.0000 to 0x0081.FFFF

0x0080.0000 to 0x0083.FFFF

Code (Flash Bank 1)

MAIN ECC Corrected

128KB

256KB

0x0002.0000 to 0x0003.FFFF

0x0004.0000 to 0x0007.FFFF

MAIN ECC Uncorrected

0x0042.0000 to 0x0043.FFFF

0x0044.0000 to 0x0047.FFFF

Flash ECC code

0x0082.0000 to 0x0083.FFFF

0x0084.0000 to 0x0087.FFFF

Data Flash Bank

Data Flash ECC Corrected

16KB

16KB

0x41D0.0000 to 0x41D0.3FFF

0x41D0.0000 to 0x41D0.3FFF

Data Flash Unchecked

0x41E0.0000 to 0x41E0.3FFF

0x41E0.0000 to 0x41E0.3FFF

Data Flash ECC code

0x41F0.0000 to 0x41F0.3FFF

0x41F0.0000 to 0x41F0.3FFF

SRAM (Bank 0)

SRAM ECC Corrected

64KB

64KB

0x2000.0000 to 0x2000.FFFF

0x2000.0000 to 0x2000.FFFF

SRAM Parity Checked

0x2010.0000 to 0x2010.FFFF

0x2010.0000 to 0x2010.FFFF

SRAM Unchecked

0x2020.0000 to 0x2020.FFFF

0x2020.0000 to 0x2020.FFFF

SRAM ECC code

0x2030.0000 to 0x2030.FFFF

0x2030.0000 to 0x2030.FFFF

SRAM (Bank 1)

SRAM Unchecked

64KB

64KB

0x2021.0000 to 0x2021.FFFF

0x2021.0000 to 0x2021.FFFF

Peripheral

Peripherals

0x4000.0000 to 0x40FF.FFFF

0x4000.0000 to 0x40FF.FFFF

NONMAIN Corrected

2KB

2KB

0x41C0.0000 to 0x41C0.07FF

0x41C0.0000 to 0x41C0.07FF

NONMAIN Uncorrected

0x41C1.0000 to 0x41C1.07FF

0x41C1.0000 to 0x41C1.07FF

NONMAIN ECC code

0x41C2.0000 to 0x41C2.07FF

0x41C2.0000 to 0x41C2.07FF

FACTORY Corrected

512Bytes

512Bytes

0x41C4.0000 to 0x41C4.01FF

0x41C4.0000 to 0x41C4.01FF

FACTORY Uncorrected

0x41C5.0000 to 0x41C5.01FF

0x41C5.0000 to 0x41C5.01FF

FACTORY ECC code

0x41C6.0000 to 0x41C6.01FF

0x41C6.0000 to 0x41C6.01FF

Subsystem

0x6000.0000 to 0x7FFF.FFFF

0x6000.0000 to 0x7FFF.FFFF

System PPB

0xE000.0000 to 0xE00F.FFFF

0xE000.0000 to 0xE00F.FFFF