SLASFA2 November   2024 MSPM0G1519 , MSPM0G3519

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Device Comparison
    1. 5.1 Device Comparison Chart
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 SYSOSC Typical Frequency Accuracy
      3. 7.9.3 Low Frequency Oscillator (LFOSC)
      4. 7.9.4 System Phase Lock Loop (SYSPLL)
      5. 7.9.5 Low Frequency Crystal/Clock
      6. 7.9.6 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 DAC
      1. 7.16.1 DAC_Supply Specifications
      2. 7.16.2 DAC Output Specifications
      3. 7.16.3 DAC Dynamic Specifications
      4. 7.16.4 DAC Linearity Specifications
      5. 7.16.5 DAC Timing Specifications
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 TIMx
    21. 7.21 TRNG
      1. 7.21.1 TRNG Electrical Characteristics
      2. 7.21.2 TRNG Switching Characteristics
    22. 7.22 Emulation and Debug
      1. 7.22.1 SWD Timing
  9. Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0Gx51x)
    4. 8.4  Security
    5. 8.5  Power Management Unit (PMU)
    6. 8.6  Clock Module (CKM)
    7. 8.7  DMA
    8. 8.8  Events
    9. 8.9  Memory
      1. 8.9.1 Memory Organization
      2. 8.9.2 Peripheral File Map
      3. 8.9.3 Peripheral Interrupt Vector
    10. 8.10 Flash Memory
    11. 8.11 SRAM
    12. 8.12 GPIO
    13. 8.13 IOMUX
    14. 8.14 ADC
    15. 8.15 Temperature Sensor
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 DAC
    19. 8.19 TRNG
    20. 8.20 AESADV
    21. 8.21 Keystore
    22. 8.22 CRC-P
    23. 8.23 MATHACL
    24. 8.24 UART
    25. 8.25 I2C
    26. 8.26 SPI
    27. 8.27 CAN-FD
    28. 8.28 Low-Frequency Sub System (LFSS)
    29. 8.29 RTC_B
    30. 8.30 IWDT_B
    31. 8.31 WWDT
    32. 8.32 Timers (TIMx)
    33. 8.33 Device Analog Connections
    34. 8.34 Input/Output Diagrams
    35. 8.35 Serial Wire Debug Interface
    36. 8.36 Boot Strap Loader (BSL)
    37. 8.37 Device Factory Constants
    38. 8.38 Identification
  10. Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 6-14 Serial Peripheral Interface (SPI) Signal Descriptions
SIGNAL
NAME
PIN
TYPE
DESCRIPTION RHB PIN RGZ PIN PT PIN PM PIN PN PIN PZ PIN
SPI0_PICO IO SPI0 peripheral in controller out signal 13, 18, 9 11, 14, 17, 29, 36 11, 14, 17, 29, 36 14, 45, 50, 55, 7 13, 18, 23, 43, 58 18, 23, 28, 53, 73
SPI0_POCI IO SPI0 peripheral out controller in signal 11, 14, 17, 8 10, 13, 18, 28, 38 10, 13, 18, 28, 38 16, 44, 49, 56, 6 12, 17, 28, 42, 60 17, 22, 33, 52, 75
SPI0_SCK IO SPI0 serial clock 10, 15, 16 12, 15, 19, 27, 37 12, 15, 19, 27, 37 15, 46, 5, 51, 57 14, 19, 29, 41, 59 19, 24, 34, 51, 74
SPI1_PICO IO SPI1 peripheral in controller out signal 22 22, 25, 33 22, 25, 33 11, 21, 3, 60 26, 32, 39, 55, 69 31, 42, 49, 70, 84
SPI1_POCI IO SPI1 peripheral out controller in signal 20, 23 21, 24, 31, 34 21, 24, 31, 34 12, 2, 20, 59, 9 25, 31, 38, 45, 56, 68 30, 41, 48, 55, 71, 83
SPI1_SCK IO SPI1 serial clock 21, 24 23, 26, 32, 35 23, 26, 32, 35 10, 13, 22, 4, 61 27, 33, 40, 54, 57, 70 32, 43, 50, 69, 72, 85
SPI2_PICO IO SPI2 peripheral in controller out signal 52 20 12, 25
SPI2_POCI IO SPI2 peripheral out controller in signal 6 8 8 42, 53 10, 21 15, 26
SPI2_SCK IO SPI2 serial clock 14 18 18 56 28 13, 33
SPI0_CS0 IO SPI0 chip select 0 signal 12, 22, 6, 8 10, 16, 33, 8 10, 16, 33, 8 11, 27, 42, 44, 54 10, 12, 22, 55, 64, 75 15, 17, 27, 70, 79, 95
SPI0_CS1 IO SPI0 chip select 1 signal 16, 21, 7 20, 27, 32, 42, 9 20, 27, 32, 42, 9 10, 23, 28, 43, 5, 58 11, 30, 41, 54, 63, 71, 76 16, 40, 51, 69, 78, 86, 96
SPI0_CS2 IO SPI0 chip select 2 signal 11, 18, 26, 28 13, 21, 29, 40, 41, 44 13, 21, 29, 40, 41, 44 18, 19, 25, 37, 48, 49, 59, 7 16, 17, 31, 43, 5, 62, 67, 73 21, 22, 41, 5, 53, 77, 82, 93
SPI0_CS3 IO SPI0 chip select 3 signal 12, 17, 2, 25, 27, 7 16, 2, 24, 28, 39, 42, 43, 5, 9 16, 2, 24, 28, 39, 42, 43, 5, 9 17, 2, 23, 24, 34, 36, 39, 43, 47, 54, 6 11, 15, 2, 22, 38, 4, 42, 61, 7, 71, 72 16, 2, 20, 27, 4, 48, 52, 7, 76, 86, 92
SPI1_CS0 IO SPI1 chip select 0 signal 17, 30, 6 20, 28, 41, 46, 8 20, 28, 41, 46, 8 1, 19, 30, 42, 58, 6 10, 24, 30, 37, 42, 50, 67, 78 15, 29, 40, 47, 52, 65, 82, 98
SPI1_CS1 IO SPI1 chip select 1 signal 16, 25, 27, 31 27, 36, 39, 42, 43, 47 27, 36, 39, 42, 43, 47 14, 17, 23, 24, 29, 31, 5, 64 36, 41, 51, 58, 61, 66, 71, 72, 77, 79 46, 51, 66, 73, 76, 81, 86, 92, 97, 99
SPI1_CS2 IO SPI1 chip select 2 signal 18, 19, 28 29, 30, 37, 44 29, 30, 37, 44 15, 25, 47, 63, 7, 8 15, 35, 43, 44, 47, 52, 59, 65, 73 20, 45, 53, 54, 57, 67, 74, 80, 93
SPI1_CS3 IO SPI1 chip select 3 signal 29 24, 38, 45 24, 38, 45 16, 2, 26, 48, 62 16, 34, 38, 46, 53, 60, 74 21, 44, 48, 56, 68, 75, 94
SPI2_CS0 IO SPI2 chip select 0 signal 8 10 10 44 12 17
SPI2_CS1 IO SPI2 chip select 1 signal 9 11 11 45 13 18
SPI2_CS2 IO SPI2 chip select 2 signal 10 12 12 46 14 19
SPI2_CS3 IO SPI2 chip select 3 signal 47 15 20