SLASFA2 November   2024 MSPM0G3519

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
        1. 7.9.2.1 SYSOSC Typical Frequency Accuracy
      3. 7.9.3 System Phase Lock Loop (SYSPLL)
      4. 7.9.4 Low Frequency Crystal/Clock
      5. 7.9.5 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 Comparator (COMP)
      1. 7.15.1 Comparator Electrical Characteristics
    16. 7.16 DAC
      1. 7.16.1 DAC_Supply Specifications
      2. 7.16.2 DAC Output Specifications
      3. 7.16.3 DAC Dynamic Specifications
      4. 7.16.4 DAC Linearity Specifications
      5. 7.16.5 DAC Timing Specifications
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 TIMx
    21. 7.21 TRNG
      1. 7.21.1 TRNG Electrical Characteristics
      2. 7.21.2 TRNG Switching Characteristics
    22. 7.22 Emulation and Debug
      1. 7.22.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0Gx51x)
    4. 8.4  Security
    5. 8.5  Power Management Unit (PMU)
    6. 8.6  Clock Module (CKM)
    7. 8.7  DMA
    8. 8.8  Events
    9. 8.9  Memory
      1. 8.9.1 Memory Organization
      2. 8.9.2 Peripheral File Map
      3. 8.9.3 Peripheral Interrupt Vector
    10. 8.10 Flash Memory
    11. 8.11 SRAM
    12. 8.12 GPIO
    13. 8.13 IOMUX
    14. 8.14 ADC
    15. 8.15 Temperature Sensor
    16. 8.16 Low-Frequency Sub System (LFSS)
    17. 8.17 VREF
    18. 8.18 COMP
    19. 8.19 DAC
    20. 8.20 TRNG
    21. 8.21 AESADV
    22. 8.22 Keystore
    23. 8.23 CRC-P
    24. 8.24 MATHACL
    25. 8.25 UART
    26. 8.26 I2C
    27. 8.27 SPI
    28. 8.28 CAN-FD
    29. 8.29 IWDT_B
    30. 8.30 WWDT
    31. 8.31 RTC_B
    32. 8.32 Timers (TIMx)
    33. 8.33 Device Analog Connections
    34. 8.34 Input/Output Diagrams
    35. 8.35 Serial Wire Debug Interface
    36. 8.36 Boot Strap Loader (BSL)
    37. 8.37 Device Factory Constants
    38. 8.38 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 6-18 Universal Asynchronous Receiver Transmitter (UART) Signal Descriptions
SIGNAL
NAME		 PIN
TYPE		 DESCRIPTION RHB PIN RGZ PIN PT PIN PM PIN PN PIN PZ PIN
UART0_CTS I UART0 clear to send signal 13, 18, 9 11, 17, 29, 38 11, 17, 29, 38 16, 27, 36, 45, 55, 7 13, 23, 4, 43, 60, 75 18, 28, 4, 53, 75, 95
UART0_RTS O UART0 ready to send signal 10, 12, 19 12, 16, 30 12, 16, 30 28, 37, 46, 54, 8 14, 22, 44, 5, 76 19, 27, 5, 54, 96
UART0_RX I UART0 receive signal (RXD) 15, 2 19, 2, 5 19, 2, 5 34, 39, 48, 57 16, 2, 29, 7 2, 21, 34, 7
UART0_TX O UART0 transmit signal (TXD) 1, 14 1, 18, 3 1, 18, 3 33, 35, 47, 56 1, 15, 28, 3 1, 20, 3, 33
UART1_CTS I UART1 clear to send signal 16, 25 14, 22, 27, 39 14, 22, 27, 39 17, 22, 5, 50, 60 18, 26, 32, 41, 61, 70 23, 31, 42, 51, 76, 85
UART1_RTS O UART1 ready to send signal 17, 26 15, 23, 28, 40 15, 23, 28, 40 18, 51, 6, 61 19, 27, 33, 42, 62 24, 32, 43, 52, 77
UART1_RX I UART1 receive signal (RXD) 10, 13, 22, 8 10, 12, 17, 21, 33 10, 12, 17, 21, 33 11, 21, 44, 46, 53, 55, 59 12, 14, 21, 23, 31, 47, 55, 69 17, 19, 26, 28, 41, 57, 70, 84
UART1_TX O UART1 transmit signal (TXD) 12, 21, 7, 9 11, 16, 20, 32, 9 11, 16, 20, 32, 9 10, 20, 43, 45, 52, 54, 58 11, 13, 20, 22, 30, 46, 54, 68 16, 18, 25, 27, 40, 56, 69, 83
UART3_CTS I UART3 clear to send signal 16, 27 25, 27, 43 25, 27, 43 24, 3, 5, 52 20, 39, 41, 52, 65, 72 25, 49, 51, 67, 80, 92
UART3_RTS O UART3 ready to send signal 17, 28 26, 28, 44 26, 28, 44 25, 4, 53, 6 21, 40, 42, 53, 66, 73 26, 50, 52, 68, 81, 93
UART3_RX I UART3 receive signal (RXD) 17, 29, 30, 31 15, 28, 45, 46, 47 15, 28, 45, 46, 47 1, 26, 30, 31, 51, 6 19, 37, 42, 64, 74, 78, 79 24, 47, 52, 79, 94, 98, 99
UART3_TX O UART3 transmit signal (TXD) 18, 29, 30 14, 29, 45, 46 14, 29, 45, 46 26, 30, 50, 64, 7 18, 36, 43, 63, 74, 78 23, 46, 53, 78, 94, 98
UART4_CTS I UART4 clear to send signal 6 38, 8 38, 8 16, 42, 64 10, 36, 60 15, 46, 75
UART4_RTS O UART4 ready to send signal 13, 25, 9 11, 17, 39 11, 17, 39 1, 17, 45, 55 13, 23, 37, 61 18, 28, 47, 76
UART4_RX I UART4 receive signal (RXD) 37 37 15, 21, 63 35, 59, 69 45, 74, 84
UART4_TX O UART4 transmit signal (TXD) 36 36 14, 20, 62 34, 58, 68 44, 73, 83
UART5_CTS I UART5 clear to send signal 3 3 35 26, 3 3, 31
UART5_RTS O UART5 ready to send signal 36 27, 4 32, 4
UART5_RX I UART5 receive signal (RXD) 1 1 1 33 1, 24 1, 14, 29
UART5_TX O UART5 transmit signal (TXD) 2 2 2 34 2, 25 2, 30, 37
UART6_CTS I UART6 clear to send signal 22 26, 70 31, 85, 89
UART6_RTS O UART6 ready to send signal 42 42 23 27, 71 32, 86, 90
UART6_RX I UART6 receive signal (RXD) 20 24, 68 29, 83, 87
UART6_TX O UART6 transmit signal (TXD) 21 25, 69 30, 84, 88
UART7_CTS I UART7 clear to send signal 16, 20, 25, 29, 7 14, 20, 27, 31, 38, 39, 45, 9 14, 20, 27, 31, 38, 39, 45, 9 16, 17, 26, 37, 43, 5, 50, 58, 9 11, 18, 30, 41, 45, 5, 60, 61, 74 16, 23, 40, 5, 51, 55, 75, 76, 94
UART7_RTS O UART7 ready to send signal 19, 30, 8 10, 15, 21, 30, 41, 42, 46 10, 15, 21, 30, 41, 42, 46 19, 23, 30, 36, 44, 51, 59, 8 12, 19, 31, 4, 44, 67, 71, 78 17, 24, 4, 41, 54, 82, 86, 98
UART7_RX I UART7 receive signal (RXD) 18, 26, 28 15, 26, 29, 37, 40, 44 15, 26, 29, 37, 40, 44 15, 18, 25, 4, 51, 7 19, 40, 43, 59, 62, 73 24, 50, 53, 74, 77, 93
UART7_TX O UART7 transmit signal (TXD) 17, 25, 27 14, 25, 28, 36, 39, 43 14, 25, 28, 36, 39, 43 14, 17, 24, 3, 50, 6 18, 39, 42, 58, 61, 72 23, 49, 52, 73, 76, 92