SLASEX5C October   2022  – January 2024 MSPM0L1105 , MSPM0L1106

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Device Comparison
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
    3. 6.3 Signal Descriptions
    4. 6.4 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 POR and BOR
      2. 7.6.2 Power Supply Ramp
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
        1. 7.9.1.1 SYSOSC Typical Frequency Accuracy
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
    10. 7.10 Digital IO
      1. 7.10.1 Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF
      1. 7.14.1 Voltage Characteristics
      2. 7.14.2 Electrical Characteristics
    15. 7.15 GPAMP
      1. 7.15.1 Electrical Characteristics
      2. 7.15.2 Switching Characteristics
    16. 7.16 I2C
      1. 7.16.1 I2C Characteristics
      2. 7.16.2 I2C Filter
      3. 7.16.3 I2C Timing Diagram
    17. 7.17 SPI
      1. 7.17.1 SPI
      2. 7.17.2 SPI Timing Diagram
    18. 7.18 UART
    19. 7.19 TIMx
    20. 7.20 Emulation and Debug
      1. 7.20.1 SWD Timing
  9. Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode (MSPM0L110x)
    3. 8.3  Power Management Unit (PMU)
    4. 8.4  Clock Module (CKM)
    5. 8.5  DMA
    6. 8.6  Events
    7. 8.7  Memory
      1. 8.7.1 Memory Organization
      2. 8.7.2 Peripheral File Map
      3. 8.7.3 Peripheral Interrupt Vector
    8. 8.8  Flash Memory
    9. 8.9  SRAM
    10. 8.10 GPIO
    11. 8.11 IOMUX
    12. 8.12 ADC
    13. 8.13 Temperature Sensor
    14. 8.14 VREF
    15. 8.15 GPAMP
    16. 8.16 CRC
    17. 8.17 UART
    18. 8.18 SPI
    19. 8.19 I2C
    20. 8.20 WWDT
    21. 8.21 Timers (TIMx)
    22. 8.22 Device Analog Connections
    23. 8.23 Input/Output Diagrams
    24. 8.24 Bootstrap Loader (BSL)
    25. 8.25 Serial Wire Debug Interface
    26. 8.26 Device Factory Constants
    27. 8.27 Identification
  10. Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|28
  • DYY|16
  • RGE|24
  • RHB|32
  • RTR|16
  • DGS|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Core
    • Arm® 32-bit Cortex®-M0+ CPU, frequency up to 32 MHz
  • Operating characteristics
    • Extended temperature: –40°C to 105°C
    • Wide supply voltage range: 1.62 V to 3.6 V
  • Memories
    • Up to 64KB of flash
    • 4KB of SRAM
  • High-performance analog peripherals
    • One 12-bit 1.68-Msps analog-to-digital converter (ADC) with up to 10 total external channels
    • Configurable 1.4-V or 2.5-V internal ADC voltage reference (VREF)
    • One general-purpose amplifier (GPAMP)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 71 µA/MHz (CoreMark)
    • STOP: 151 µA at 4 MHz and 44 µA at 32 kHz
    • STANDBY: 1.0 µA with 32-kHz 16-bit timer running, SRAM/registers fully retained, and 32MHz clock wakeup in 3.2µs
    • SHUTDOWN: 61 nA with IO wakeup capability
  • Intelligent digital peripherals
    • 3-channel DMA controller
    • 3-channel event fabric signaling system
    • Four 16-bit general-purpose timers, each with two capture/compare registers supporting low-power operation in STANDBY mode, supporting a total of 8 PWM channels
    • Windowed watchdog timer
  • Enhanced communication interfaces
    • Two UART interfaces; one supporting LIN, IrDA, DALI, Smart Card, Manchester and both supporting low-power operation in STANDBY
    • One I2C interface supporting FM+ (1Mbit/s), SMBus, PMBus, and wakeup from STOP
    • One SPI supporting up to 16 Mbit/s
  • Clock system
  • Internal 4- to 32-MHz oscillator with ±1.2% accuracy (SYSOSC)
  • Internal 32-kHz low-frequency oscillator with ±3% accuracy (LFOSC)
  • Data integrity
    • Cyclic redundancy checker (CRC-16 or CRC-32)
  • Flexible I/O features
    • Up to 28 GPIOs
    • Two 5-V tolerant open-drain IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 32-pin VQFN (RHB)
    • 28-pin VSSOP (DGS)
    • 24-pin VQFN (RGE)
    • 20-pin VSSOP (DGS)
    • 16-pin SOT (DYY), WQFN (RTR)
  • Family members (also see Device Comparison)
    • MSPM0L1105: 32KB of flash, 4KB of RAM
    • MSPM0L1106: 64KB of flash, 4KB of RAM
  • Development kits and software (also see Tools and Software)
    • LP-MSPM0L1306 LaunchPad™ development kit
    • MSP Software Development Kit (SDK)