The serial peripheral interface (SPI) peripherals in these devices support the following key features:
- Support ULPCLK/2 bit rate and up to 16Mbits/s in both controller and peripheral mode
- Configurable as a controller or a peripheral
- Configurable chip select for both controller and peripheral
- Programmable clock prescaler and bit rate
- Programmable data frame size from 4 bits to
16 bits (controller mode) and 7 bits to 16 bit
(peripheral mode)
- Supports PACKEN feature that allows the
packing of 2 16 bit FIFO entries into a 32-bit
value to improve CPU performance
- Transmit and receive FIFOs (4 entries each with 16 bits per entry) supporting DMA data transfer
- Supports TI mode, Motorola mode and National
Microwire format
For more details, see the SPI chapter of the MSPM0 L-Series 32-MHz Microcontrollers Technical Reference Manual.