SLFS023H April 1978 – December 2024 NA556 , NE556 , SA556 , SE556
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The clock input must have VOL and VOH levels that are less than and greater than 1/3 VCC, respectively. Clock input VOL time must be less than minimum output high time; therefore, a high (positive) duty cycle clock is recommended. Minimum recommended modulation voltage is 1V. Lower CONT voltage can greatly increase threshold comparator propagation delay and storage time. The application must be tolerant of a nonlinear transfer function; the relationship between modulation input and pulse width is not linear because the capacitor charge is RC-based with an negative exponential curve.