SLLSEQ6A September 2016 – September 2016 ONET1131EC
PRODUCTION DATA.
The ONET1131EC is packaged in a small footprint 4 mm x 4 mm 32 pin RoHS compliant QFN package with a lead pitch of 0.4 mm.
NUMBER | NAME | Type | DESCRIPTION |
---|---|---|---|
LOL | 1 | Digital-out | Loss of lock indicator. High level indicates the transmitter CDR is out of lock. Open drain output. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation. This pin is 3.3 V tolerant. |
MONB | 2 | Analog-out | Bias current monitor. |
GND | 3, 6, 19, 22 | Supply | Circuit ground. |
DIN+ | 4 | Analog-in | Non-inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN–. Must be AC coupled. |
DIN– | 5 | Analog-in | Inverted transmitter data input. On-chip differentially 100 Ω terminated to TXIN+. Must be AC coupled. |
PD | 7 | Analog | Photodiode input. Pin can source or sink current dependent on register setting. |
MONP | 8 | Analog-out | Photodiode current monitor. |
LF | 9 | Analog-in | Transmitter loop filter capacitor. |
BIAS | 10 | Analog | Sinks or sources the bias current for the laser in both APC and open loop modes. |
VCC | 11, 14, 27, 30 | Supply | 2.5 V ± 5% supply. |
OUT– | 12 | CML-out | Inverted transmitter data output. Internally terminated in single-ended operation mode. |
OUT+ | 13 | CML-out | Non-Inverted transmitter data output. |
VDD | 15 | Supply | 2.5 V ± 5% supply for the digital circuitry. |
AMP | 16 | Analog-in | Output amplitude control. Output amplitude can be adjusted by applying a voltage of 0 to 2 V to this pin. Leave open when not used. |
SDA | 17 | Digital-in/out | 2-wire interface serial data input. Requires an external 4.7-kΩ to10-kΩ pull-up resistor to VCC. This pin is 3.3-V tolerant. |
SCK | 18 | Digital-in | 2-wire interface serial clock input. Requires an external 4.7-kΩ to10-kΩ pull-up resistor to VCC. This pin is 3.3-V tolerant. |
NC | 20, 21, 24, 25, 26, 28, 29 | Do not connect | |
COMP | 23 | Analog | Compensation pin used to control the bandwidth of the APC loop. Connect a 0.01-µF capacitor to ground. |
FLT | 31 | Digital-out | Transmitter fault detection flag. High level indicates that a fault has occurred. Open drain output. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation. This pin is 3.3-V tolerant. |
DIS | 32 | Digital-in | Disables the bias current when set to high state. Includes a 250-kΩ pull-up resistor to VCC. Requires an external 4.7 kΩ to 10 kΩ pull-up resistor to VCC for proper operation Toggle to reset a fault condition. This is an ORed function with the TXBIASEN bit (bit 2 in register 1). This pin is 3.3-V tolerant. |