The OPAx140 series of op amps are capable of driving 2-kΩ loads with power-supply voltages of up to ±18 V over the specified temperature range. In a single-supply configuration, where the load is connected to the negative supply voltage, the minimum load resistance is 2.8 kΩ at a supply voltage of 36 V. For lower supply voltages (either single-supply or symmetrical supplies), a lower load resistance can be used, as long as the output current does not exceed 13 mA; otherwise, the device short circuit current protection circuit can activate.

Internal power dissipation increases when operating at high supply voltages. Copper leadframe construction used in the OPA140, OPA2140, and OPA4140 series devices improves heat dissipation compared to conventional materials. Printed-circuit-board (PCB) layout can also help reduce a possible increase in junction temperature (T_J). Wide copper traces help dissipate the heat by acting as an additional heatsink. Temperature rise can be further minimized by soldering the devices directly to the PCB rather than using a socket.

Although the output current is limited by internal protection circuitry, accidental shorting of one or more output channels of a device can result in excessive heating. For instance, when an output is shorted to mid-supply, the typical short-circuit current of 36 mA leads to an internal power dissipation of over 600 mW at a supply of ±18 V. Total power dissipation (P_D) includes both the quiescent power dissipation (P_DQ) and the power dissipation due to the load (P_DL).

In the case of a dual OPA2140 in an 8-pin VSSOP package (the junction-to-ambient thermal resistance, R_θJA, is 180°C/W), such power dissipation can lead the die temperature to be 220°C above ambient temperature (T_A), when both channels are shorted. This temperature increase significantly decreases the operating life of the device. T_J can be approximated using Equation 1.

To prevent excessive heating, the OPAx140 series has an internal thermal shutdown circuit that shuts down the device if the die temperature exceeds approximately 180°C. When this thermal shutdown circuit activates, a built-in hysteresis of 15°C makes sure that the die temperature must drop to approximately 165°C before the device switches on again.

Additional consideration is needed for the combination of maximum operating voltage, maximum operating temperature, load, and package type. Figure 7-3 and Figure 7-4 show several practical considerations when evaluating the OPA2140 (dual version) and the OPA4140 (quad version).

As an example, the OPA4140 has a maximum total quiescent current of 10.8 mA (2.7 mA/channel) over temperature. The 14-pin TSSOP package has a typical R_θJA of 135°C/W. This parameter means that because T_J must not exceed 150°C to provide reliable operation, either the supply voltage must be reduced, or T_A needs to remain low enough so that the T_J does not exceed 150°C. This condition is illustrated in Figure 7-3 for various package types.

Figure 7-3 Maximum Supply Voltage vs Temperature, Quiescent State (No Load)

Figure 7-4 Maximum Supply Voltage vs Temperature, DC Worst-Case

Moreover, resistive loading of the output causes additional power dissipation and thus self-heating, which also must be considered when establishing the maximum supply voltage or operating temperature. To this end, Figure 7-4 shows the maximum supply voltage versus temperature for a 2 kΩ load resistance to mid-supply and a dc worst-case power dissipation condition. In symmetrical, bipolar supplies, the worst case dc condition is given by V_OUT = ±V_S/4.

As shown by Equation 1, the junction temperature depends on the thermal properties of the package, as expressed by R_ϴJA. If the device then begins to drive a heavy load, the junction temperature can rise and trip the thermal-shutdown circuit. For such loading cases, the DRG package includes a thermal pad that significantly reduces R_ϴJA. Proper PCB layout is essential to realize this improved thermal behavior. Figure 7-3 and Figure 7-3 show the potential improvement when using the DRG package option. For more information on PCB layout best practices, see Section 8.4.1.