SLOS931A
November 2015 – November 2015
OPA1612-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: VS = ±2.25 V to ±18 V
6.6
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Dissipation
8.3.2
Electrical Overstress
8.3.3
Operating Voltage
8.3.4
Input Protection
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Noise Performance
9.2.2.1.1
Basic Noise Calculations
9.2.2.2
Total Harmonic Distortion Measurements
9.2.2.3
Capacitive Loads
9.2.3
Application Curves
10
Power-Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Community Resource
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slos931a_oa
slos931a_pm
7 Parameter Measurement Information
Figure 29. Circuit for
Figure 3
—Voltage Noise vs Source Resistance
Figure 30. Circuit for
Figure 8
and
Figure 10
—THD+N Ratio vs Frequency
Figure 31. Circuit for
Figure 15
—Small-Signal Step Response (100 mV)
Figure 32. Circuit for
Figure 16
—Small-Signal Step Response (100 mV)
Figure 33. Circuit for
Figure 19
—Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)
Figure 34. Circuit for
Figure 20
—Small-Signal Overshoot vs Capacitive Load
(100-mV Output Step)