SBOSAC7A february   2023  – july 2023 OPA1633

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Function
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
        2. 8.4.1.2 Power Dissipation and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.1 Layout Guidelines

  1. The thermal pad is electrically isolated from the silicon and all leads. Connecting the thermal pad to any potential voltage between the power-supply voltages is acceptable; however, best practice is to tie to ground because ground is generally the largest conductive plane.
  2. Prepare the printed circuit board (PCB) with a top-side etch pattern, as shown in Figure 8-4. Use etch for the leads as well as etch for the thermal pad.
  3. Place five holes in the area of the thermal pad. Keep these holes 13 mils (0,03302 cm) in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow.
  4. Additional vias can be placed anywhere along the thermal plane outside of the thermal pad area. These vias help dissipate the heat generated by the OPA1633 device, and can be larger than the 13-mil diameter vias directly under the thermal pad. The vias can be larger because the vias are not in the thermal pad area to be soldered so that wicking is not a problem.
  5. Connect all holes to the internal ground plane.
  6. When connecting these holes to the plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This slow heat transfer makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, make sure the holes under the OPA1633 PowerPAD package connect to the internal plane with a complete connection around the entire circumference of the plated through-hole.
  7. The top-side solder mask must leave the package pins and the thermal pad area with the five holes exposed. The bottom-side solder mask must cover the five holes of the thermal pad area. This configuration prevents solder from being pulled away from the thermal pad area during the reflow process.
  8. Apply solder paste to the exposed thermal pad area and all of the device pins.

    With these preparatory steps in place, the device is simply placed in position and runs through the solder reflow operation as any standard surface-mount component. This process results in a part that is properly installed.

GUID-0614955C-C2EE-4131-B003-5BEB6BFAC398-low.gifFigure 8-4 PowerPAD Integrated Circuit Package PCB Etch and Via Pattern