SBOS701D December   2015  – August 2021 OPA191 , OPA2191 , OPA4191

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA191
    5. 6.5 Thermal Information: OPA2191
    6. 6.6 Thermal Information: OPA4191
    7. 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
    8. 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Input Offset Voltage Drift
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Protection Circuitry
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Phase Reversal Protection
      4. 8.3.4 Thermal Protection
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 Common-Mode Voltage Range
      7. 8.3.7 Electrical Overstress
      8. 8.3.8 Overload Recovery
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-side Current Measurement
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 16-Bit Precision Multiplexed Data-Acquisition System
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Slew Rate Limit for Input Protection
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI™ SImulation Software (Free Download)
        2. 12.1.1.2 TI Precision Designs
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Capacitive Load and Stability

The OPAx191 features a patented output stage capable of driving large capacitive loads, and in a unity-gain configuration, directly drives up to 1 nF of pure capacitive load. Increasing the gain enhances the ability of the amplifier to drive greater capacitive loads; see Figure 8-5. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation.

GUID-2603ADB8-A4B4-4FB2-8EA7-C8AED48597C4-low.gifFigure 8-5 Transient Response with a Purely Capacitive Load of 1 nF

Like many low-power amplifiers, some ringing can occur even with capacitive loads less than 100 pF. In unity-gain configurations with no or very light dc loads, place an RC snubber circuit at the OPAx191 output to reduce any possibility of ringing in lightly-loaded applications. Figure 8-6 illustrates the recommended RC snubber circuit.

GUID-A062705E-5057-4849-88ED-3EA7B38C3391-low.gifFigure 8-6 RC Snubber Circuit for Lightly-Loaded Applications in Unity Gain

For additional drive capability in unity-gain configurations, improve capacitive load drive by inserting a small,
10-Ω to 20-Ω resistor (RISO) in series with the output, as shown in Figure 8-7. This resistor significantly reduces ringing while maintaining dc performance for purely capacitive loads. However, if there is a resistive load in parallel with the capacitive load, a voltage divider is created, introducing a gain error at the output and slightly reducing the output swing. The error introduced is proportional to the ratio RISO / RL, and is generally negligible at low output levels. A high capacitive load drive makes the OPA191 a great choice for applications such as reference buffers, MOSFET gate drives, and cable-shield drives. The circuit shown in Figure 8-7 uses RISO to stabilize the output of an op amp. RISO modifies the open-loop gain of the system for increased phase margin. Results using the OPA191 are summarized in Table 8-2. For additional information on techniques to optimize and design using this circuit, TI Precision Design TIPD128, Capacitive Load Drive Verified Reference Design Using an Isolation Resistor, details complete design goals, simulation, and test results.

GUID-C67D8012-6F61-43A4-830D-4A934B8558F9-low.gifFigure 8-7 Extending Capacitive Load Drive With the OPA191
Table 8-2 OPA191 Capacitive Load Drive Solution Using Isolation Resistor Comparison of Calculated and Measured Results
PARAMETERVALUE
Capacitive Load100 pF1000 pF0.01 µF0.1 µF1 µF
Phase Margin45°45°60°45°60°45°60°45°60°
RISO (Ω)2801134326821017.853.63.610
Measured Overshoot (%)23238238238238