The OPA210 and OPA2210 (OPAx210) are the next generation of OPAx209 operational amplifier (op amp). The OPAx210 precision op amps are built on TI's precision, super-beta, complementary bipolar semiconductor process, which offers ultra-low flicker noise, low offset voltage, and low offset voltage temperature drift.
The OPAx210 achieve very low voltage noise density (2.2 nV/√Hz) while consuming only 2.5 mA (maximum) per amplifier. These devices also offer rail-to-rail output swing, which helps maximize dynamic range.
In precision data-acquisition applications, the OPAx210 provide fast settling time to 16-bit accuracy, even for 10-V output swings. Excellent ac performance, combined with only 35 μV (maximum) of offset and 0.6 µV/°C (maximum) drift over temperature, makes the OPAx210 an excellent choice for high-speed, high-precision applications.
The OPAx210 are specified over a wide dual power-supply range of ±2.25 V to ±18 V, or single-supply operation from 4.5 V to 36 V, are specified from –40°C to +125°C.
PART NUMBER | PACKAGE(1) | BODY SIZE (NOM) |
---|---|---|
OPA210 | SOIC (8) | 2.90 mm × 1.60 mm |
SOT-23 (5) | 2.90 mm × 1.60 mm | |
VSSOP (8) | 3.00 mm × 3.00 mm | |
OPA2210 | SOIC (8) | 4.90 mm × 3.91 mm |
VSSOP (8) | 3.00 mm × 3.00 mm | |
WSON (8) | 3.00 mm × 3.00 mm |
Changes from Revision G (April 2021) to Revision H (August 2021)
Changes from Revision F (January 2021) to Revision G (April 2021)
Changes from Revision E (Novembver 2020) to Revision F (January 2021)
Changes from Revision D (January 2020) to Revision E (November 2020)
Changes from Revision C (September 2019) to Revision D (January 2020)
Changes from Revision B (March 2019) to Revision C (September 2019)
Changes from Revision A (December 2018) to Revision B (February 2019)
Changes from Revision * (September 2018) to Revision A (December 2018)
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOIC, VSSOP | SOT-23 | ||
–IN | 2 | 4 | I | Inverting input |
+IN | 3 | 3 | I | Noninverting input |
NC | 1, 5, 8 | — | — | No internal connection |
OUT | 6 | 1 | O | Output |
V– | 4 | 2 | — | Negative (lowest) power supply |
V+ | 7 | 5 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input, channel A |
+IN A | 3 | I | Noninverting input, channel A |
–IN B | 6 | I | Inverting input, channel B |
+IN B | 5 | I | Noninverting input, channel B |
OUT A | 1 | O | Output, channel A |
OUT B | 7 | O | Output, channel B |
V– | 4 | — | Negative (lowest) power supply |
V+ | 8 | — | Positive (highest) power supply |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Voltage | Supply voltage, VS = (V+) – (V–) | 40 | V | ||
Signal input pins(2) | (V–) – 0.5 | (V+) + 0.5 | |||
Signal input pins | Differential | 1 | |||
Current | Signal input pins(2) | –10 | 10 | mA | |
Output short circuit(3) | Continuous | ||||
Temperature | Junction, TJ | 150 | °C | ||
Storage temperature, Tstg | –65 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 |
MIN | MAX | UNIT | |
---|---|---|---|
Specified voltage, VS | ±2.25 | ±18 | V |
Specified temperature | –40 | 125 | °C |
Operating temperature, TA | –55 | 150 | °C |