SBOS079C March   1999  – February 2023 OPA2277 , OPA277 , OPA4277

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA277
    5. 6.5 Thermal Information: OPA2277
    6. 6.6 Thermal Information: OPA4277
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Offset Voltage Adjustment
      3. 7.3.3 Input Protection
      4. 7.3.4 Input Bias Current Cancellation
      5. 7.3.5 EMI Rejection Ratio (EMIRR)
        1. 7.3.5.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Second-Order, Low-Pass Filter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Load Cell Amplifier
      3. 8.2.3 Thermocouple Low-Offset, Low-Drift Loop Measurement With Diode Cold Junction Compensation
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 DRM Package (8-Pin VSON)
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 DIP-Adapter-EVM
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI Reference Designs
        6. 9.1.1.6 Filter Design Tool
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DRM|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

at TA = 25°C, VS = 10 V to 30 V, VCM = VOUT = VS / 2, and RL = 2 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage   OPA277P, U ±10 ±20 µV
OPA2277P, U ±10 ±25
OPAx277PA, UA ±20 ±50
OPAx277AIDRM ±35 ±100
TA = –40°C to +85°C OPA277P, U ±30
OPA2277P, U ±50
OPAx277PA, UA ±100
OPAx277AIDRM ±165
dVOS/dT Input offset voltage drift TA = –40°C to +85°C OPA277P, U ±0.1 ±0.15 µV/°C
OPA2277P, U ±0.1 ±0.25
OPAx277AIDRM, PA, UA ±0.15 ±1
Long-term drift  0.2 µV/mo
PSRR Power-supply rejection ratio VS = ±2 V to ±18 V OPAx277P, U ±0.3 ±0.5 µV/V
OPAx277AIDRM, PA, UA ±0.3 ±1
VS = ±2 V to ±18 V,
TA = –40°C to +85°C
OPAx277P, U ±0.5
OPAx277AIDRM, PA, UA ±1
Channel separation (dual, quad) dc 0.1 µV/V
INPUT BIAS CURRENT
IB Input bias current  OPAx277P, U ±0.5 ±1 nA
OPAx277AIDRM, PA, UA ±0.5 ±2.8
TA = –40°C to +85°C OPAx277P, U ±2
OPAx277AIDRM, PA, UA ±4
IOS Input offset current OPAx277P, U ±0.5 ±1 nA
OPAx277AIDRM, PA, UA ±0.5 ±2.8
TA = –40°C to +85°C OPAx277P, U ±2
OPAx277AIDRM, PA, UA ±4
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 0.22 µVPP
en Input voltage noise density f = 10 Hz 12 nV/√Hz
f = 100 Hz 8
f = 1 kHz 8
f = 10 kHz 8
in Input current noise density f = 1 kHz 0.2 pA/√Hz
INPUT VOLTAGE
VCM Common-mode voltage range (V–) + 2 (V+) – 2 V
CMRR Common-mode rejection ratio VCM = (V–) + 2 V to (V+) – 2 V OPAx277P, U 130 140 dB
OPAx277AIDRM, PA, UA 115 140
VCM = (V–) + 2 V to (V+) – 2 V,
TA = –40°C to +85°C
OPAx277P, U 128
OPAx277AIDRM, PA, UA 115
INPUT IMPEDANCE
ZID Differential 100 || 3 MΩ || pF
ZIC Common-mode VCM = (V–) + 2 V to (V+) – 2 V 250 || 3 GΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VO = (V–) + 0.5 V to (V+) – 1.2 V,
RL = 10 kΩ
140 dB
VO = (V–) + 1.5 V to (V+) – 1.5 V,
RL = 2 kΩ 
126 134
TA = –40°C to +85°C 126
FREQUENCY RESPONSE
GBW Gain-bandwidth product 1 MHz
SR Slew rate 0.8 V/µs
ts Settling time VS = ±15 V, G = 1, 10-V step To 0.1% 14 µs
To 0.01% 16
tOR Overload recovery time VIN × G = VS 3 µs
THD+N Total harmonic distortion + noise G = 1, f = 1 kHz, VO = 3.5 VRMS 0.002%
OUTPUT
VO Voltage output RL = 10 kΩ (V–) + 0.5 (V+) – 1.2 V
TA = –40°C to +85°C (V–) + 0.5 (V+) – 1.2
RL = 2 kΩ (V–) + 1.5 (V+) – 1.5
TA = –40°C to +85°C (V–) + 1.5 (V+) – 1.5
ISC Short-circuit current ±35 mA
CL  Capacitive load drive See Typical Characteristics
ZO Open-loop output impedance f = 1 MHz 40 Ω
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 A ±790 ±825 µA
TA = –40°C to +85°C ±900