SBOSAE8B October   2023  – April 2024 OPA2323 , OPA323 , OPA4323

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Operating Voltage
      2. 7.3.2  Rail-to-Rail Input
      3. 7.3.3  Rail-to-Rail Output
      4. 7.3.4  Common-Mode Rejection Ratio (CMRR)
      5. 7.3.5  Capacitive Load and Stability
      6. 7.3.6  Overload Recovery
      7. 7.3.7  EMI Rejection
      8. 7.3.8  ESD and Electrical Overstress
      9. 7.3.9  Input ESD Protection
      10. 7.3.10 Shutdown Function
      11. 7.3.11 Packages with an Exposed Thermal Pad
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 OPAx323 in Low-Side, Current Sensing Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4.     Trademarks
    5. 9.4 Electrostatic Discharge Caution
    6. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DDF|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Thermal Information for Dual Channel

THERMAL METRIC (1) OPA2323 OPA2323S UNIT
D 
(SOIC		 PW (2)
(TSSOP)		 DGK 
(VSSOP)		 DDF 
(SOT-23-8)		 DSG (2)
(WSON)		 RUG (2)
(X2QFN)
8 PINS 8 PINS 8 PINS 8 PINS 8 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 139.0 TBD 173.6 149.6 TBD 144.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 81.2 TBD 65.1 72.9 TBD 47.1 °C/W
RθJB Junction-to-board thermal resistance 82.4 TBD 95.1 68.4 TBD 76.0 °C/W
ψJT Junction-to-top characterization parameter 31.3 TBD 10.0 4.0 TBD 0.8 °C/W
ψJB Junction-to-board characterization parameter 81.6 TBD 93.5 68.1 TBD 75.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a TBD n/a n/a TBD n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics  application report.
(2) This package option is preview.