The OPA325, OPA2325, and OPA4325 (OPAx325) are precision, low-voltage complementary metal-oxide semiconductor (CMOS) operational amplifiers optimized for very low noise and wide bandwidth, while operating on a low quiescent current of only 650 μA.
The OPAx325 feature a linear input stage with zero-crossover distortion that delivers excellent common-mode rejection ratio (CMRR) of typically 114 dB over the entire input range. The input common-mode range extends 100 mV beyond the negative and positive supply rails. The output voltage typically swings within 10 mV of the rails.
The zero-crossover distortion, combined with wide bandwidth (10 MHz), high slew rate (5 V/µs), and low noise (9 nV/√Hz), make the OPAx325 a very good successive-approximation register (SAR) analog-to-digital converter (ADC) input driver amplifier. In addition, the OPAx325 have a wide supply-voltage range from 2.2 V to 5.5 V, with excellent power-supply rejection ratio (PSRR) over the entire supply range, making the device an excellent choice for precision, low-power applications that run directly from batteries without regulation.
The OPA325 (single-channel version) is available in the SOT23-5 package. The OPA2325 (dual-channel version) is offered in SO-8 and MSOP-8 packages. The OPA4325 (quad-channel version) is available in TSSOP-14 package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
OPA325 | SOT-23 (5) | 2.90 mm × 1.60 mm |
OPA2325 | SOIC (8) | 4.90 mm × 3.91 mm |
VSSOP (8) | 3.00 mm × 3.00 mm | |
OPA4325 | TSSOP (14) | 5.00 mm × 4.40 mm |
Changes from C Revision (May 2019) to D Revision
Changes from B Revision (February 2019) to C Revision
Changes from A Revision (July 2017) to B Revision
Changes from * Revision (October 2016) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN | 4 | I | Inverting input |
+IN | 3 | I | Noninverting input |
OUT | 1 | O | Output |
V– | 2 | — | Negative (lowest) power supply |
V+ | 5 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input channel A |
+IN A | 3 | I | Noninverting input channel A |
–IN B | 6 | I | Inverting input channel B |
+IN B | 5 | I | Noninverting input channel B |
OUT A | 1 | O | Output channel A |
OUT B | 7 | O | Output channel B |
V– | 4 | — | Negative supply |
V+ | 8 | — | Positive supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input channel A |
+IN A | 3 | I | Noninverting input channel A |
–IN B | 6 | I | Inverting input channel B |
+IN B | 5 | I | Noninverting input channel B |
–IN C | 9 | I | Inverting input channel C |
+IN C | 10 | I | Noninverting input channel C |
–IN D | 13 | I | Inverting input channel D |
+IN D | 12 | I | Noninverting input channel D |
OUT A | 1 | O | Output channel A |
OUT B | 7 | O | Output channel B |
OUT C | 8 | O | Output channel C |
OUT D | 14 | O | Output channel D |
V– | 11 | — | Negative supply |
V+ | 4 | — | Positive supply |