SBOS926G January   2021  – April 2024 OPA2392 , OPA392

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information - OPA392
    5. 6.5 Thermal Information - OPA2392
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Operating Voltage
      2. 7.3.2 Low Input Bias Current
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
  • YBJ|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-9446DFB2-24A0-447B-A4B5-87A0485FF3EC-low.gifFigure 5-1 OPA392 DBV Package, 5-Pin SOT-23 (Top View)
Figure 5-3 OPA392 YBJ Package, 6-Pin DSBGA (Top View)
GUID-128FA7E3-8698-45C0-AABE-73FD076C4EE4-low.gifFigure 5-2 OPA392 DCK Preview Package, 5-Pin SC70 (Top View)
Table 5-1 Pin Functions: OPA392
PIN TYPE DESCRIPTION
NAME NO.
DBV (SOT-23) DCK (SC70) YBJ (DSBGA)
EN — — B2 Input Enable pin. High = amplifier enabled.
–IN 4 3 B1 Input Inverting input
+IN 3 1 C1 Input Noninverting input
OUT 1 4 A1 Output Output
V– 2 2 C2 Power Negative (lowest) power supply
V+ 5 5 A2 Power Positive (highest) power supply
GUID-CD30933B-FDA3-4D18-BF91-4064782A917F-low.gifFigure 5-4 OPA2392 D Package, 8-Pin SOIC and DGK Package, 8-Pin VSSOP (Top View)
Figure 5-6 OPA2392 YBJ Package, 9-Pin DSBGA (Top View)
Figure 5-5 OPA2392 DSG Preview Package, 8-Pin WSON With Exposed Thermal Pad (Top View)
Table 5-2 Pin Functions: OPA2392
PIN TYPE DESCRIPTION
NAME NO.
D (SOIC),
DGK (VSSOP)		 DSG (WSON) YBJ (DSBGA)
EN — — B2 Input Enable pin. High = both amplifiers enabled.
–IN A 2 2 B1 Input Inverting input, channel A
+IN A 3 3 C1 Input Noninverting input, channel A
–IN B 6 6 B3 Input Inverting input, channel B
+IN B 5 5 C3 Input Noninverting input, channel B
OUT A 1 1 A1 Output Output, channel A
OUT B 7 7 A3 Output Output, channel B
V– 4 4 C2 Power Negative (lowest) power supply
V+ 8 8 A2 Power Positive (highest) power supply
Thermal Pad — Thermal pad — — Connect thermal pad to V–
GUID-E4345B66-106B-4662-8A41-57CE2F2BD88F-low.gifFigure 5-7 OPA4392 PW Preview Package, 14-Pin TSSOP (Top View)
Figure 5-8 OPA4392 RTE Preview Package, 16-Pin WQFN (Top View)
Table 5-3 Pin Functions: OPA4392
PIN TYPE DESCRIPTION
NAME NO.
PW (TSSOP) RTE (WQFN)
EN AB — 6 Input Enable pin for A and B amplifiers. High = amplifiers A and B are enabled.
EN CD — 7 Input Enable pin for C and D amplifiers. High = amplifiers C and D are enabled.
–IN A 2 16 Input Inverting input, channel A
+IN A 3 1 Input Noninverting input, channel A
–IN B 6 4 Input Inverting input, channel B
+IN B 5 3 Input Noninverting input, channel B
–IN C 9 9 Input Inverting input, channel C
+IN C 10 10 Input Noninverting input, channel C
–IN D 13 13 Input Inverting input, channel D
+IN D 12 12 Input Noninverting input, channel D
OUT A 1 15 Output Output, channel A
OUT B 7 5 Output Output, channel B
OUT C 8 8 Output Output, channel C
OUT D 14 14 Output Output, channel D
Thermal Pad — Thermal Pad Power Connect thermal pad to V–
V– 11 11 Power Negative (lowest) power supply
V+ 4 2 Power Positive (highest) power supply